Texas Instruments
LM4F121C4QR
2024.06.02
ARM Cortex-M3 Stellaris Device
false
8
32
ADC0
Register map for ADC0 peripheral
ADC
0x0
0x0
0x1000
registers
n
ACTSS
ADC Active Sample Sequencer
0x0
-1
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC0ACTSS
ADC Active Sample Sequencer
0x0
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC0CC
ADC Clock Configuration
0xFC8
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the 16 MHz clock derived from PLL / 25 (default)
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
ADC0DCCMP0
ADC Digital Comparator Range 0
0xE40
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
ADC0DCCMP1
ADC Digital Comparator Range 1
0xE44
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
ADC0DCCMP2
ADC Digital Comparator Range 2
0xE48
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
ADC0DCCMP3
ADC Digital Comparator Range 3
0xE4C
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
ADC0DCCMP4
ADC Digital Comparator Range 4
0xE50
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
ADC0DCCMP5
ADC Digital Comparator Range 5
0xE54
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
ADC0DCCMP6
ADC Digital Comparator Range 6
0xE58
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
ADC0DCCMP7
ADC Digital Comparator Range 7
0xE5C
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
ADC0DCCTL0
ADC Digital Comparator Control 0
0xE00
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL1
ADC Digital Comparator Control 1
0xE04
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL2
ADC Digital Comparator Control 2
0xE08
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL3
ADC Digital Comparator Control 3
0xE0C
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL4
ADC Digital Comparator Control 4
0xE10
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL5
ADC Digital Comparator Control 5
0xE14
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL6
ADC Digital Comparator Control 6
0xE18
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL7
ADC Digital Comparator Control 7
0xE1C
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
ADC0DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
ADC0DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
read-write
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
ADC0EMUX
ADC Event Multiplexer Select
0x14
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
ADC0IM
ADC Interrupt Mask
0x8
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ADC0ISC
ADC Interrupt Status and Clear
0xC
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
ADC0OSTAT
ADC Overflow Status
0x10
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
ADC0PC
ADC Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
ADC0PP
ADC Peripheral Properties
0xFC0
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
ADC0PSSI
ADC Processor Sample Sequence Initiate
0x28
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
ADC0RIS
ADC Raw Interrupt Status
0x4
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
ADC0SAC
ADC Sample Averaging Control
0x30
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
ADC0SPC
ADC Sample Phase Control
0x24
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
ADC0SSCTL0
ADC Sample Sequence Control 0
0x44
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL0_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL0_D4
5th Sample Diff Input Select
16
17
ADC_SSCTL0_D5
6th Sample Diff Input Select
20
21
ADC_SSCTL0_D6
7th Sample Diff Input Select
24
25
ADC_SSCTL0_D7
8th Sample Diff Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
ADC0SSCTL1
ADC Sample Sequence Control 1
0x64
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL1_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL2
ADC Sample Sequence Control 2
0x84
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL2_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL3
ADC Sample Sequence Control 3
0xA4
read-write
n
0x0
0x0
ADC_SSCTL3_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL3_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL3_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
ADC0SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
ADC0SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC0SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
ADC0SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
ADC0SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
ADC0SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
ADC0SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
ADC0SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
ADC0SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
ADC0SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
ADC0SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
ADC0SSOP0
ADC Sample Sequence 0 Operation
0x50
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
ADC0SSOP1
ADC Sample Sequence 1 Operation
0x70
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP2
ADC Sample Sequence 2 Operation
0x90
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP3
ADC Sample Sequence 3 Operation
0xB0
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC0SSPRI
ADC Sample Sequencer Priority
0x20
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS0_1ST
First priority
0x0
ADC_SSPRI_SS0_2ND
Second priority
0x1
ADC_SSPRI_SS0_3RD
Third priority
0x2
ADC_SSPRI_SS0_4TH
Fourth priority
0x3
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS1_1ST
First priority
0x0
ADC_SSPRI_SS1_2ND
Second priority
0x1
ADC_SSPRI_SS1_3RD
Third priority
0x2
ADC_SSPRI_SS1_4TH
Fourth priority
0x3
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS2_1ST
First priority
0x0
ADC_SSPRI_SS2_2ND
Second priority
0x1
ADC_SSPRI_SS2_3RD
Third priority
0x2
ADC_SSPRI_SS2_4TH
Fourth priority
0x3
ADC_SSPRI_SS3
SS3 Priority
12
14
ADC_SSPRI_SS3_1ST
First priority
0x0
ADC_SSPRI_SS3_2ND
Second priority
0x1
ADC_SSPRI_SS3_3RD
Third priority
0x2
ADC_SSPRI_SS3_4TH
Fourth priority
0x3
ADC0USTAT
ADC Underflow Status
0x18
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
CC
ADC Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the 16 MHz clock derived from PLL / 25 (default)
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
DCCMP0
ADC Digital Comparator Range 0
0xE40
-1
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
DCCMP1
ADC Digital Comparator Range 1
0xE44
-1
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
DCCMP2
ADC Digital Comparator Range 2
0xE48
-1
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
DCCMP3
ADC Digital Comparator Range 3
0xE4C
-1
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
DCCMP4
ADC Digital Comparator Range 4
0xE50
-1
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
DCCMP5
ADC Digital Comparator Range 5
0xE54
-1
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
DCCMP6
ADC Digital Comparator Range 6
0xE58
-1
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
DCCMP7
ADC Digital Comparator Range 7
0xE5C
-1
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
DCCTL0
ADC Digital Comparator Control 0
0xE00
-1
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
DCCTL1
ADC Digital Comparator Control 1
0xE04
-1
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
DCCTL2
ADC Digital Comparator Control 2
0xE08
-1
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
DCCTL3
ADC Digital Comparator Control 3
0xE0C
-1
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
DCCTL4
ADC Digital Comparator Control 4
0xE10
-1
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
DCCTL5
ADC Digital Comparator Control 5
0xE14
-1
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
DCCTL6
ADC Digital Comparator Control 6
0xE18
-1
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
DCCTL7
ADC Digital Comparator Control 7
0xE1C
-1
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
-1
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
-1
read-write
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
EMUX
ADC Event Multiplexer Select
0x14
-1
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
IM
ADC Interrupt Mask
0x8
-1
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ISC
ADC Interrupt Status and Clear
0xC
-1
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
OSTAT
ADC Overflow Status
0x10
-1
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
PC
ADC Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
PP
ADC Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
PSSI
ADC Processor Sample Sequence Initiate
0x28
-1
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
RIS
ADC Raw Interrupt Status
0x4
-1
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
SAC
ADC Sample Averaging Control
0x30
-1
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
SPC
ADC Sample Phase Control
0x24
-1
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
SSCTL0
ADC Sample Sequence Control 0
0x44
-1
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL0_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL0_D4
5th Sample Diff Input Select
16
17
ADC_SSCTL0_D5
6th Sample Diff Input Select
20
21
ADC_SSCTL0_D6
7th Sample Diff Input Select
24
25
ADC_SSCTL0_D7
8th Sample Diff Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
SSCTL1
ADC Sample Sequence Control 1
0x64
-1
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL1_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
SSCTL2
ADC Sample Sequence Control 2
0x84
-1
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL2_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
SSCTL3
ADC Sample Sequence Control 3
0xA4
-1
read-write
n
0x0
0x0
ADC_SSCTL3_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL3_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL3_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
-1
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
-1
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
-1
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
-1
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
-1
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
-1
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
-1
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
-1
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
-1
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
-1
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
-1
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
-1
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
-1
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
SSOP0
ADC Sample Sequence 0 Operation
0x50
-1
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
SSOP1
ADC Sample Sequence 1 Operation
0x70
-1
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP2
ADC Sample Sequence 2 Operation
0x90
-1
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP3
ADC Sample Sequence 3 Operation
0xB0
-1
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
SSPRI
ADC Sample Sequencer Priority
0x20
-1
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS0_1ST
First priority
0x0
ADC_SSPRI_SS0_2ND
Second priority
0x1
ADC_SSPRI_SS0_3RD
Third priority
0x2
ADC_SSPRI_SS0_4TH
Fourth priority
0x3
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS1_1ST
First priority
0x0
ADC_SSPRI_SS1_2ND
Second priority
0x1
ADC_SSPRI_SS1_3RD
Third priority
0x2
ADC_SSPRI_SS1_4TH
Fourth priority
0x3
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS2_1ST
First priority
0x0
ADC_SSPRI_SS2_2ND
Second priority
0x1
ADC_SSPRI_SS2_3RD
Third priority
0x2
ADC_SSPRI_SS2_4TH
Fourth priority
0x3
ADC_SSPRI_SS3
SS3 Priority
12
14
ADC_SSPRI_SS3_1ST
First priority
0x0
ADC_SSPRI_SS3_2ND
Second priority
0x1
ADC_SSPRI_SS3_3RD
Third priority
0x2
ADC_SSPRI_SS3_4TH
Fourth priority
0x3
USTAT
ADC Underflow Status
0x18
-1
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
ADC1
Register map for ADC0 peripheral
ADC
0x0
0x0
0x1000
registers
n
ACTSS
ADC Active Sample Sequencer
0x0
-1
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC0ACTSS
ADC Active Sample Sequencer
0x0
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC0CC
ADC Clock Configuration
0xFC8
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the 16 MHz clock derived from PLL / 25 (default)
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
ADC0DCCMP0
ADC Digital Comparator Range 0
0xE40
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
ADC0DCCMP1
ADC Digital Comparator Range 1
0xE44
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
ADC0DCCMP2
ADC Digital Comparator Range 2
0xE48
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
ADC0DCCMP3
ADC Digital Comparator Range 3
0xE4C
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
ADC0DCCMP4
ADC Digital Comparator Range 4
0xE50
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
ADC0DCCMP5
ADC Digital Comparator Range 5
0xE54
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
ADC0DCCMP6
ADC Digital Comparator Range 6
0xE58
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
ADC0DCCMP7
ADC Digital Comparator Range 7
0xE5C
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
ADC0DCCTL0
ADC Digital Comparator Control 0
0xE00
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL1
ADC Digital Comparator Control 1
0xE04
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL2
ADC Digital Comparator Control 2
0xE08
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL3
ADC Digital Comparator Control 3
0xE0C
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL4
ADC Digital Comparator Control 4
0xE10
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL5
ADC Digital Comparator Control 5
0xE14
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL6
ADC Digital Comparator Control 6
0xE18
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL7
ADC Digital Comparator Control 7
0xE1C
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
ADC0DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
ADC0DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
read-write
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
ADC0EMUX
ADC Event Multiplexer Select
0x14
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
ADC0IM
ADC Interrupt Mask
0x8
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ADC0ISC
ADC Interrupt Status and Clear
0xC
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
ADC0OSTAT
ADC Overflow Status
0x10
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
ADC0PC
ADC Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
ADC0PP
ADC Peripheral Properties
0xFC0
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
ADC0PSSI
ADC Processor Sample Sequence Initiate
0x28
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
ADC0RIS
ADC Raw Interrupt Status
0x4
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
ADC0SAC
ADC Sample Averaging Control
0x30
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
ADC0SPC
ADC Sample Phase Control
0x24
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
ADC0SSCTL0
ADC Sample Sequence Control 0
0x44
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL0_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL0_D4
5th Sample Diff Input Select
16
17
ADC_SSCTL0_D5
6th Sample Diff Input Select
20
21
ADC_SSCTL0_D6
7th Sample Diff Input Select
24
25
ADC_SSCTL0_D7
8th Sample Diff Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
ADC0SSCTL1
ADC Sample Sequence Control 1
0x64
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL1_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL2
ADC Sample Sequence Control 2
0x84
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL2_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL3
ADC Sample Sequence Control 3
0xA4
read-write
n
0x0
0x0
ADC_SSCTL3_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL3_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL3_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
ADC0SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
ADC0SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC0SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
ADC0SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
ADC0SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
ADC0SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
ADC0SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
ADC0SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
ADC0SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
ADC0SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
ADC0SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
ADC0SSOP0
ADC Sample Sequence 0 Operation
0x50
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
ADC0SSOP1
ADC Sample Sequence 1 Operation
0x70
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP2
ADC Sample Sequence 2 Operation
0x90
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP3
ADC Sample Sequence 3 Operation
0xB0
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC0SSPRI
ADC Sample Sequencer Priority
0x20
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS0_1ST
First priority
0x0
ADC_SSPRI_SS0_2ND
Second priority
0x1
ADC_SSPRI_SS0_3RD
Third priority
0x2
ADC_SSPRI_SS0_4TH
Fourth priority
0x3
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS1_1ST
First priority
0x0
ADC_SSPRI_SS1_2ND
Second priority
0x1
ADC_SSPRI_SS1_3RD
Third priority
0x2
ADC_SSPRI_SS1_4TH
Fourth priority
0x3
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS2_1ST
First priority
0x0
ADC_SSPRI_SS2_2ND
Second priority
0x1
ADC_SSPRI_SS2_3RD
Third priority
0x2
ADC_SSPRI_SS2_4TH
Fourth priority
0x3
ADC_SSPRI_SS3
SS3 Priority
12
14
ADC_SSPRI_SS3_1ST
First priority
0x0
ADC_SSPRI_SS3_2ND
Second priority
0x1
ADC_SSPRI_SS3_3RD
Third priority
0x2
ADC_SSPRI_SS3_4TH
Fourth priority
0x3
ADC0USTAT
ADC Underflow Status
0x18
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
CC
ADC Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the 16 MHz clock derived from PLL / 25 (default)
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
DCCMP0
ADC Digital Comparator Range 0
0xE40
-1
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
DCCMP1
ADC Digital Comparator Range 1
0xE44
-1
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
DCCMP2
ADC Digital Comparator Range 2
0xE48
-1
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
DCCMP3
ADC Digital Comparator Range 3
0xE4C
-1
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
DCCMP4
ADC Digital Comparator Range 4
0xE50
-1
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
DCCMP5
ADC Digital Comparator Range 5
0xE54
-1
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
DCCMP6
ADC Digital Comparator Range 6
0xE58
-1
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
DCCMP7
ADC Digital Comparator Range 7
0xE5C
-1
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
DCCTL0
ADC Digital Comparator Control 0
0xE00
-1
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
DCCTL1
ADC Digital Comparator Control 1
0xE04
-1
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
DCCTL2
ADC Digital Comparator Control 2
0xE08
-1
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
DCCTL3
ADC Digital Comparator Control 3
0xE0C
-1
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
DCCTL4
ADC Digital Comparator Control 4
0xE10
-1
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
DCCTL5
ADC Digital Comparator Control 5
0xE14
-1
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
DCCTL6
ADC Digital Comparator Control 6
0xE18
-1
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
DCCTL7
ADC Digital Comparator Control 7
0xE1C
-1
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
-1
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
-1
read-write
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
EMUX
ADC Event Multiplexer Select
0x14
-1
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_EXTERNAL
External (GPIO PB4)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
IM
ADC Interrupt Mask
0x8
-1
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ISC
ADC Interrupt Status and Clear
0xC
-1
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
OSTAT
ADC Overflow Status
0x10
-1
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
PC
ADC Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
PP
ADC Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
PSSI
ADC Processor Sample Sequence Initiate
0x28
-1
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
RIS
ADC Raw Interrupt Status
0x4
-1
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
SAC
ADC Sample Averaging Control
0x30
-1
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
SPC
ADC Sample Phase Control
0x24
-1
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
SSCTL0
ADC Sample Sequence Control 0
0x44
-1
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL0_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL0_D4
5th Sample Diff Input Select
16
17
ADC_SSCTL0_D5
6th Sample Diff Input Select
20
21
ADC_SSCTL0_D6
7th Sample Diff Input Select
24
25
ADC_SSCTL0_D7
8th Sample Diff Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
SSCTL1
ADC Sample Sequence Control 1
0x64
-1
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL1_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
SSCTL2
ADC Sample Sequence Control 2
0x84
-1
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Diff Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Diff Input Select
8
9
ADC_SSCTL2_D3
4th Sample Diff Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
SSCTL3
ADC Sample Sequence Control 3
0xA4
-1
read-write
n
0x0
0x0
ADC_SSCTL3_D0
1st Sample Diff Input Select
0
1
ADC_SSCTL3_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL3_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
-1
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
-1
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
-1
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
-1
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
-1
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
-1
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
-1
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
-1
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
-1
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
-1
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
-1
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
-1
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
-1
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
SSOP0
ADC Sample Sequence 0 Operation
0x50
-1
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
SSOP1
ADC Sample Sequence 1 Operation
0x70
-1
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP2
ADC Sample Sequence 2 Operation
0x90
-1
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP3
ADC Sample Sequence 3 Operation
0xB0
-1
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
SSPRI
ADC Sample Sequencer Priority
0x20
-1
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS0_1ST
First priority
0x0
ADC_SSPRI_SS0_2ND
Second priority
0x1
ADC_SSPRI_SS0_3RD
Third priority
0x2
ADC_SSPRI_SS0_4TH
Fourth priority
0x3
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS1_1ST
First priority
0x0
ADC_SSPRI_SS1_2ND
Second priority
0x1
ADC_SSPRI_SS1_3RD
Third priority
0x2
ADC_SSPRI_SS1_4TH
Fourth priority
0x3
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS2_1ST
First priority
0x0
ADC_SSPRI_SS2_2ND
Second priority
0x1
ADC_SSPRI_SS2_3RD
Third priority
0x2
ADC_SSPRI_SS2_4TH
Fourth priority
0x3
ADC_SSPRI_SS3
SS3 Priority
12
14
ADC_SSPRI_SS3_1ST
First priority
0x0
ADC_SSPRI_SS3_2ND
Second priority
0x1
ADC_SSPRI_SS3_3RD
Third priority
0x2
ADC_SSPRI_SS3_4TH
Fourth priority
0x3
USTAT
ADC Underflow Status
0x18
-1
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
CAN0
Register map for CAN0 peripheral
CAN
0x0
0x0
0x1000
registers
n
BIT
CAN Bit Timing
0xC
-1
read-write
n
0x0
0x0
CAN_BIT_BRP
Baud Rate Prescaler
0
6
CAN_BIT_SJW
(Re)Synchronization Jump Width
6
8
CAN_BIT_TSEG1
Time Segment Before Sample Point
8
12
CAN_BIT_TSEG2
Time Segment after Sample Point
12
15
BRPE
CAN Baud Rate Prescaler Extension
0x18
-1
read-write
n
0x0
0x0
CAN_BRPE_BRPE
Baud Rate Prescaler Extension
0
4
CAN0BIT
CAN Bit Timing
0xC
read-write
n
0x0
0x0
CAN_BIT_BRP
Baud Rate Prescaler
0
6
CAN_BIT_SJW
(Re)Synchronization Jump Width
6
8
CAN_BIT_TSEG1
Time Segment Before Sample Point
8
12
CAN_BIT_TSEG2
Time Segment after Sample Point
12
15
CAN0BRPE
CAN Baud Rate Prescaler Extension
0x18
read-write
n
0x0
0x0
CAN_BRPE_BRPE
Baud Rate Prescaler Extension
0
4
CAN0CTL
CAN Control
0x0
read-write
n
0x0
0x0
CAN_CTL_CCE
Configuration Change Enable
6
7
CAN_CTL_DAR
Disable Automatic-Retransmission
5
6
CAN_CTL_EIE
Error Interrupt Enable
3
4
CAN_CTL_IE
CAN Interrupt Enable
1
2
CAN_CTL_INIT
Initialization
0
1
CAN_CTL_SIE
Status Interrupt Enable
2
3
CAN_CTL_TEST
Test Mode Enable
7
8
CAN0ERR
CAN Error Counter
0x8
read-write
n
0x0
0x0
CAN_ERR_REC
Receive Error Counter
8
15
CAN_ERR_RP
Received Error Passive
15
16
CAN_ERR_TEC
Transmit Error Counter
0
8
CAN0IF1ARB1
CAN IF1 Arbitration 1
0x30
read-write
n
0x0
0x0
CAN_IF1ARB1_ID
Message Identifier
0
16
CAN0IF1ARB2
CAN IF1 Arbitration 2
0x34
read-write
n
0x0
0x0
CAN_IF1ARB2_DIR
Message Direction
13
14
CAN_IF1ARB2_ID
Message Identifier
0
13
CAN_IF1ARB2_MSGVAL
Message Valid
15
16
CAN_IF1ARB2_XTD
Extended Identifier
14
15
CAN0IF1CMSK
CAN IF1 Command Mask
0x24
read-write
n
0x0
0x0
CAN_IF1CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF1CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF1CMSK_CONTROL
Access Control Bits
4
5
CAN_IF1CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF1CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF1CMSK_MASK
Access Mask Bits
6
7
CAN_IF1CMSK_NEWDAT
Access New Data
2
3
CAN_IF1CMSK_WRNRD
Write, Not Read
7
8
CAN0IF1CRQ
CAN IF1 Command Request
0x20
read-write
n
0x0
0x0
CAN_IF1CRQ_BUSY
Busy Flag
15
16
CAN_IF1CRQ_MNUM
Message Number
0
6
CAN0IF1DA1
CAN IF1 Data A1
0x3C
read-write
n
0x0
0x0
CAN_IF1DA1_DATA
Data
0
16
CAN0IF1DA2
CAN IF1 Data A2
0x40
read-write
n
0x0
0x0
CAN_IF1DA2_DATA
Data
0
16
CAN0IF1DB1
CAN IF1 Data B1
0x44
read-write
n
0x0
0x0
CAN_IF1DB1_DATA
Data
0
16
CAN0IF1DB2
CAN IF1 Data B2
0x48
read-write
n
0x0
0x0
CAN_IF1DB2_DATA
Data
0
16
CAN0IF1MCTL
CAN IF1 Message Control
0x38
read-write
n
0x0
0x0
CAN_IF1MCTL_DLC
Data Length Code
0
4
CAN_IF1MCTL_EOB
End of Buffer
7
8
CAN_IF1MCTL_INTPND
Interrupt Pending
13
14
CAN_IF1MCTL_MSGLST
Message Lost
14
15
CAN_IF1MCTL_NEWDAT
New Data
15
16
CAN_IF1MCTL_RMTEN
Remote Enable
9
10
CAN_IF1MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF1MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF1MCTL_TXRQST
Transmit Request
8
9
CAN_IF1MCTL_UMASK
Use Acceptance Mask
12
13
CAN0IF1MSK1
CAN IF1 Mask 1
0x28
read-write
n
0x0
0x0
CAN_IF1MSK1_IDMSK
Identifier Mask
0
16
CAN0IF1MSK2
CAN IF1 Mask 2
0x2C
read-write
n
0x0
0x0
CAN_IF1MSK2_IDMSK
Identifier Mask
0
13
CAN_IF1MSK2_MDIR
Mask Message Direction
14
15
CAN_IF1MSK2_MXTD
Mask Extended Identifier
15
16
CAN0IF2ARB1
CAN IF2 Arbitration 1
0x90
read-write
n
0x0
0x0
CAN_IF2ARB1_ID
Message Identifier
0
16
CAN0IF2ARB2
CAN IF2 Arbitration 2
0x94
read-write
n
0x0
0x0
CAN_IF2ARB2_DIR
Message Direction
13
14
CAN_IF2ARB2_ID
Message Identifier
0
13
CAN_IF2ARB2_MSGVAL
Message Valid
15
16
CAN_IF2ARB2_XTD
Extended Identifier
14
15
CAN0IF2CMSK
CAN IF2 Command Mask
0x84
read-write
n
0x0
0x0
CAN_IF2CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF2CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF2CMSK_CONTROL
Access Control Bits
4
5
CAN_IF2CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF2CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF2CMSK_MASK
Access Mask Bits
6
7
CAN_IF2CMSK_NEWDAT
Access New Data
2
3
CAN_IF2CMSK_WRNRD
Write, Not Read
7
8
CAN0IF2CRQ
CAN IF2 Command Request
0x80
read-write
n
0x0
0x0
CAN_IF2CRQ_BUSY
Busy Flag
15
16
CAN_IF2CRQ_MNUM
Message Number
0
6
CAN0IF2DA1
CAN IF2 Data A1
0x9C
read-write
n
0x0
0x0
CAN_IF2DA1_DATA
Data
0
16
CAN0IF2DA2
CAN IF2 Data A2
0xA0
read-write
n
0x0
0x0
CAN_IF2DA2_DATA
Data
0
16
CAN0IF2DB1
CAN IF2 Data B1
0xA4
read-write
n
0x0
0x0
CAN_IF2DB1_DATA
Data
0
16
CAN0IF2DB2
CAN IF2 Data B2
0xA8
read-write
n
0x0
0x0
CAN_IF2DB2_DATA
Data
0
16
CAN0IF2MCTL
CAN IF2 Message Control
0x98
read-write
n
0x0
0x0
CAN_IF2MCTL_DLC
Data Length Code
0
4
CAN_IF2MCTL_EOB
End of Buffer
7
8
CAN_IF2MCTL_INTPND
Interrupt Pending
13
14
CAN_IF2MCTL_MSGLST
Message Lost
14
15
CAN_IF2MCTL_NEWDAT
New Data
15
16
CAN_IF2MCTL_RMTEN
Remote Enable
9
10
CAN_IF2MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF2MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF2MCTL_TXRQST
Transmit Request
8
9
CAN_IF2MCTL_UMASK
Use Acceptance Mask
12
13
CAN0IF2MSK1
CAN IF2 Mask 1
0x88
read-write
n
0x0
0x0
CAN_IF2MSK1_IDMSK
Identifier Mask
0
16
CAN0IF2MSK2
CAN IF2 Mask 2
0x8C
read-write
n
0x0
0x0
CAN_IF2MSK2_IDMSK
Identifier Mask
0
13
CAN_IF2MSK2_MDIR
Mask Message Direction
14
15
CAN_IF2MSK2_MXTD
Mask Extended Identifier
15
16
CAN0INT
CAN Interrupt
0x10
read-write
n
0x0
0x0
CAN_INT_INTID
Interrupt Identifier
0
16
CAN_INT_INTID_NONE
No interrupt pending
0x0
CAN_INT_INTID_STATUS
Status Interrupt
0x8000
CAN0MSG1INT
CAN Message 1 Interrupt Pending
0x140
read-write
n
0x0
0x0
CAN_MSG1INT_INTPND
Interrupt Pending Bits
0
16
CAN0MSG1VAL
CAN Message 1 Valid
0x160
read-write
n
0x0
0x0
CAN_MSG1VAL_MSGVAL
Message Valid Bits
0
16
CAN0MSG2INT
CAN Message 2 Interrupt Pending
0x144
read-write
n
0x0
0x0
CAN_MSG2INT_INTPND
Interrupt Pending Bits
0
16
CAN0MSG2VAL
CAN Message 2 Valid
0x164
read-write
n
0x0
0x0
CAN_MSG2VAL_MSGVAL
Message Valid Bits
0
16
CAN0NWDA1
CAN New Data 1
0x120
read-write
n
0x0
0x0
CAN_NWDA1_NEWDAT
New Data Bits
0
16
CAN0NWDA2
CAN New Data 2
0x124
read-write
n
0x0
0x0
CAN_NWDA2_NEWDAT
New Data Bits
0
16
CAN0STS
CAN Status
0x4
read-write
n
0x0
0x0
CAN_STS_BOFF
Bus-Off Status
7
8
CAN_STS_EPASS
Error Passive
5
6
CAN_STS_EWARN
Warning Status
6
7
CAN_STS_LEC
Last Error Code
0
3
CAN_STS_LEC_NONE
No Error
0x0
CAN_STS_LEC_STUFF
Stuff Error
0x1
CAN_STS_LEC_FORM
Format Error
0x2
CAN_STS_LEC_ACK
ACK Error
0x3
CAN_STS_LEC_BIT1
Bit 1 Error
0x4
CAN_STS_LEC_BIT0
Bit 0 Error
0x5
CAN_STS_LEC_CRC
CRC Error
0x6
CAN_STS_LEC_NOEVENT
No Event
0x7
CAN_STS_RXOK
Received a Message Successfully
4
5
CAN_STS_TXOK
Transmitted a Message Successfully
3
4
CAN0TST
CAN Test
0x14
read-write
n
0x0
0x0
CAN_TST_BASIC
Basic Mode
2
3
CAN_TST_LBACK
Loopback Mode
4
5
CAN_TST_RX
Receive Observation
7
8
CAN_TST_SILENT
Silent Mode
3
4
CAN_TST_TX
Transmit Control
5
7
CAN_TST_TX_CANCTL
CAN Module Control
0x0
CAN_TST_TX_SAMPLE
Sample Point
0x1
CAN_TST_TX_DOMINANT
Driven Low
0x2
CAN_TST_TX_RECESSIVE
Driven High
0x3
CAN0TXRQ1
CAN Transmission Request 1
0x100
read-write
n
0x0
0x0
CAN_TXRQ1_TXRQST
Transmission Request Bits
0
16
CAN0TXRQ2
CAN Transmission Request 2
0x104
read-write
n
0x0
0x0
CAN_TXRQ2_TXRQST
Transmission Request Bits
0
16
CTL
CAN Control
0x0
-1
read-write
n
0x0
0x0
CAN_CTL_CCE
Configuration Change Enable
6
7
CAN_CTL_DAR
Disable Automatic-Retransmission
5
6
CAN_CTL_EIE
Error Interrupt Enable
3
4
CAN_CTL_IE
CAN Interrupt Enable
1
2
CAN_CTL_INIT
Initialization
0
1
CAN_CTL_SIE
Status Interrupt Enable
2
3
CAN_CTL_TEST
Test Mode Enable
7
8
ERR
CAN Error Counter
0x8
-1
read-write
n
0x0
0x0
CAN_ERR_REC
Receive Error Counter
8
15
CAN_ERR_RP
Received Error Passive
15
16
CAN_ERR_TEC
Transmit Error Counter
0
8
IF1ARB1
CAN IF1 Arbitration 1
0x30
-1
read-write
n
0x0
0x0
CAN_IF1ARB1_ID
Message Identifier
0
16
IF1ARB2
CAN IF1 Arbitration 2
0x34
-1
read-write
n
0x0
0x0
CAN_IF1ARB2_DIR
Message Direction
13
14
CAN_IF1ARB2_ID
Message Identifier
0
13
CAN_IF1ARB2_MSGVAL
Message Valid
15
16
CAN_IF1ARB2_XTD
Extended Identifier
14
15
IF1CMSK
CAN IF1 Command Mask
0x24
-1
read-write
n
0x0
0x0
CAN_IF1CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF1CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF1CMSK_CONTROL
Access Control Bits
4
5
CAN_IF1CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF1CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF1CMSK_MASK
Access Mask Bits
6
7
CAN_IF1CMSK_NEWDAT
Access New Data
2
3
CAN_IF1CMSK_TXRQST
Access Transmission Request
2
3
CAN_IF1CMSK_WRNRD
Write, Not Read
7
8
IF1CRQ
CAN IF1 Command Request
0x20
-1
read-write
n
0x0
0x0
CAN_IF1CRQ_BUSY
Busy Flag
15
16
CAN_IF1CRQ_MNUM
Message Number
0
6
IF1DA1
CAN IF1 Data A1
0x3C
-1
read-write
n
0x0
0x0
CAN_IF1DA1_DATA
Data
0
16
IF1DA2
CAN IF1 Data A2
0x40
-1
read-write
n
0x0
0x0
CAN_IF1DA2_DATA
Data
0
16
IF1DB1
CAN IF1 Data B1
0x44
-1
read-write
n
0x0
0x0
CAN_IF1DB1_DATA
Data
0
16
IF1DB2
CAN IF1 Data B2
0x48
-1
read-write
n
0x0
0x0
CAN_IF1DB2_DATA
Data
0
16
IF1MCTL
CAN IF1 Message Control
0x38
-1
read-write
n
0x0
0x0
CAN_IF1MCTL_DLC
Data Length Code
0
4
CAN_IF1MCTL_EOB
End of Buffer
7
8
CAN_IF1MCTL_INTPND
Interrupt Pending
13
14
CAN_IF1MCTL_MSGLST
Message Lost
14
15
CAN_IF1MCTL_NEWDAT
New Data
15
16
CAN_IF1MCTL_RMTEN
Remote Enable
9
10
CAN_IF1MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF1MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF1MCTL_TXRQST
Transmit Request
8
9
CAN_IF1MCTL_UMASK
Use Acceptance Mask
12
13
IF1MSK1
CAN IF1 Mask 1
0x28
-1
read-write
n
0x0
0x0
CAN_IF1MSK1_IDMSK
Identifier Mask
0
16
IF1MSK2
CAN IF1 Mask 2
0x2C
-1
read-write
n
0x0
0x0
CAN_IF1MSK2_IDMSK
Identifier Mask
0
13
CAN_IF1MSK2_MDIR
Mask Message Direction
14
15
CAN_IF1MSK2_MXTD
Mask Extended Identifier
15
16
IF2ARB1
CAN IF2 Arbitration 1
0x90
-1
read-write
n
0x0
0x0
CAN_IF2ARB1_ID
Message Identifier
0
16
IF2ARB2
CAN IF2 Arbitration 2
0x94
-1
read-write
n
0x0
0x0
CAN_IF2ARB2_DIR
Message Direction
13
14
CAN_IF2ARB2_ID
Message Identifier
0
13
CAN_IF2ARB2_MSGVAL
Message Valid
15
16
CAN_IF2ARB2_XTD
Extended Identifier
14
15
IF2CMSK
CAN IF2 Command Mask
0x84
-1
read-write
n
0x0
0x0
CAN_IF2CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF2CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF2CMSK_CONTROL
Access Control Bits
4
5
CAN_IF2CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF2CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF2CMSK_MASK
Access Mask Bits
6
7
CAN_IF2CMSK_NEWDAT
Access New Data
2
3
CAN_IF2CMSK_TXRQST
Access Transmission Request
2
3
CAN_IF2CMSK_WRNRD
Write, Not Read
7
8
IF2CRQ
CAN IF2 Command Request
0x80
-1
read-write
n
0x0
0x0
CAN_IF2CRQ_BUSY
Busy Flag
15
16
CAN_IF2CRQ_MNUM
Message Number
0
6
IF2DA1
CAN IF2 Data A1
0x9C
-1
read-write
n
0x0
0x0
CAN_IF2DA1_DATA
Data
0
16
IF2DA2
CAN IF2 Data A2
0xA0
-1
read-write
n
0x0
0x0
CAN_IF2DA2_DATA
Data
0
16
IF2DB1
CAN IF2 Data B1
0xA4
-1
read-write
n
0x0
0x0
CAN_IF2DB1_DATA
Data
0
16
IF2DB2
CAN IF2 Data B2
0xA8
-1
read-write
n
0x0
0x0
CAN_IF2DB2_DATA
Data
0
16
IF2MCTL
CAN IF2 Message Control
0x98
-1
read-write
n
0x0
0x0
CAN_IF2MCTL_DLC
Data Length Code
0
4
CAN_IF2MCTL_EOB
End of Buffer
7
8
CAN_IF2MCTL_INTPND
Interrupt Pending
13
14
CAN_IF2MCTL_MSGLST
Message Lost
14
15
CAN_IF2MCTL_NEWDAT
New Data
15
16
CAN_IF2MCTL_RMTEN
Remote Enable
9
10
CAN_IF2MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF2MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF2MCTL_TXRQST
Transmit Request
8
9
CAN_IF2MCTL_UMASK
Use Acceptance Mask
12
13
IF2MSK1
CAN IF2 Mask 1
0x88
-1
read-write
n
0x0
0x0
CAN_IF2MSK1_IDMSK
Identifier Mask
0
16
IF2MSK2
CAN IF2 Mask 2
0x8C
-1
read-write
n
0x0
0x0
CAN_IF2MSK2_IDMSK
Identifier Mask
0
13
CAN_IF2MSK2_MDIR
Mask Message Direction
14
15
CAN_IF2MSK2_MXTD
Mask Extended Identifier
15
16
INT
CAN Interrupt
0x10
-1
read-write
n
0x0
0x0
CAN_INT_INTID
Interrupt Identifier
0
16
CAN_INT_INTID_NONE
No interrupt pending
0x0
CAN_INT_INTID_STATUS
Status Interrupt
0x8000
MSG1INT
CAN Message 1 Interrupt Pending
0x140
-1
read-write
n
0x0
0x0
CAN_MSG1INT_INTPND
Interrupt Pending Bits
0
16
MSG1VAL
CAN Message 1 Valid
0x160
-1
read-write
n
0x0
0x0
CAN_MSG1VAL_MSGVAL
Message Valid Bits
0
16
MSG2INT
CAN Message 2 Interrupt Pending
0x144
-1
read-write
n
0x0
0x0
CAN_MSG2INT_INTPND
Interrupt Pending Bits
0
16
MSG2VAL
CAN Message 2 Valid
0x164
-1
read-write
n
0x0
0x0
CAN_MSG2VAL_MSGVAL
Message Valid Bits
0
16
NWDA1
CAN New Data 1
0x120
-1
read-write
n
0x0
0x0
CAN_NWDA1_NEWDAT
New Data Bits
0
16
NWDA2
CAN New Data 2
0x124
-1
read-write
n
0x0
0x0
CAN_NWDA2_NEWDAT
New Data Bits
0
16
STS
CAN Status
0x4
-1
read-write
n
0x0
0x0
CAN_STS_BOFF
Bus-Off Status
7
8
CAN_STS_EPASS
Error Passive
5
6
CAN_STS_EWARN
Warning Status
6
7
CAN_STS_LEC
Last Error Code
0
3
CAN_STS_LEC_NONE
No Error
0x0
CAN_STS_LEC_STUFF
Stuff Error
0x1
CAN_STS_LEC_FORM
Format Error
0x2
CAN_STS_LEC_ACK
ACK Error
0x3
CAN_STS_LEC_BIT1
Bit 1 Error
0x4
CAN_STS_LEC_BIT0
Bit 0 Error
0x5
CAN_STS_LEC_CRC
CRC Error
0x6
CAN_STS_LEC_NOEVENT
No Event
0x7
CAN_STS_RXOK
Received a Message Successfully
4
5
CAN_STS_TXOK
Transmitted a Message Successfully
3
4
TST
CAN Test
0x14
-1
read-write
n
0x0
0x0
CAN_TST_BASIC
Basic Mode
2
3
CAN_TST_LBACK
Loopback Mode
4
5
CAN_TST_RX
Receive Observation
7
8
CAN_TST_SILENT
Silent Mode
3
4
CAN_TST_TX
Transmit Control
5
7
CAN_TST_TX_CANCTL
CAN Module Control
0x0
CAN_TST_TX_SAMPLE
Sample Point
0x1
CAN_TST_TX_DOMINANT
Driven Low
0x2
CAN_TST_TX_RECESSIVE
Driven High
0x3
TXRQ1
CAN Transmission Request 1
0x100
-1
read-write
n
0x0
0x0
CAN_TXRQ1_TXRQST
Transmission Request Bits
0
16
TXRQ2
CAN Transmission Request 2
0x104
-1
read-write
n
0x0
0x0
CAN_TXRQ2_TXRQST
Transmission Request Bits
0
16
COMP
Register map for COMP peripheral
COMP
0x0
0x0
0x1000
registers
n
ACCTL0
Analog Comparator Control 0
0x24
-1
read-write
n
0x0
0x0
COMP_ACCTL0_ASRCP
Analog Source Positive
9
11
COMP_ACCTL0_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL0_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL0_ASRCP_REF
Internal voltage reference (VIREF)
0x2
COMP_ACCTL0_CINV
Comparator Output Invert
1
2
COMP_ACCTL0_ISEN
Interrupt Sense
2
4
COMP_ACCTL0_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL0_ISEN_FALL
Falling edge
0x1
COMP_ACCTL0_ISEN_RISE
Rising edge
0x2
COMP_ACCTL0_ISEN_BOTH
Either edge
0x3
COMP_ACCTL0_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL0_TOEN
Trigger Output Enable
11
12
COMP_ACCTL0_TSEN
Trigger Sense
5
7
COMP_ACCTL0_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL0_TSEN_FALL
Falling edge
0x1
COMP_ACCTL0_TSEN_RISE
Rising edge
0x2
COMP_ACCTL0_TSEN_BOTH
Either edge
0x3
COMP_ACCTL0_TSLVAL
Trigger Sense Level Value
7
8
ACCTL1
Analog Comparator Control 1
0x44
-1
read-write
n
0x0
0x0
COMP_ACCTL1_ASRCP
Analog Source Positive
9
11
COMP_ACCTL1_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL1_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL1_ASRCP_REF
Internal voltage reference (VIREF)
0x2
COMP_ACCTL1_CINV
Comparator Output Invert
1
2
COMP_ACCTL1_ISEN
Interrupt Sense
2
4
COMP_ACCTL1_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL1_ISEN_FALL
Falling edge
0x1
COMP_ACCTL1_ISEN_RISE
Rising edge
0x2
COMP_ACCTL1_ISEN_BOTH
Either edge
0x3
COMP_ACCTL1_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL1_TOEN
Trigger Output Enable
11
12
COMP_ACCTL1_TSEN
Trigger Sense
5
7
COMP_ACCTL1_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL1_TSEN_FALL
Falling edge
0x1
COMP_ACCTL1_TSEN_RISE
Rising edge
0x2
COMP_ACCTL1_TSEN_BOTH
Either edge
0x3
COMP_ACCTL1_TSLVAL
Trigger Sense Level Value
7
8
ACINTEN
Analog Comparator Interrupt Enable
0x8
-1
read-write
n
0x0
0x0
COMP_ACINTEN_IN0
Comparator 0 Interrupt Enable
0
1
COMP_ACINTEN_IN1
Comparator 1 Interrupt Enable
1
2
ACMIS
Analog Comparator Masked Interrupt Status
0x0
-1
read-write
n
0x0
0x0
COMP_ACMIS_IN0
Comparator 0 Masked Interrupt Status
0
1
COMP_ACMIS_IN1
Comparator 1 Masked Interrupt Status
1
2
ACREFCTL
Analog Comparator Reference Voltage Control
0x10
-1
read-write
n
0x0
0x0
COMP_ACREFCTL_EN
Resistor Ladder Enable
9
10
COMP_ACREFCTL_RNG
Resistor Ladder Range
8
9
COMP_ACREFCTL_VREF
Resistor Ladder Voltage Ref
0
4
ACRIS
Analog Comparator Raw Interrupt Status
0x4
-1
read-write
n
0x0
0x0
COMP_ACRIS_IN0
Comparator 0 Interrupt Status
0
1
COMP_ACRIS_IN1
Comparator 1 Interrupt Status
1
2
ACSTAT0
Analog Comparator Status 0
0x20
-1
read-write
n
0x0
0x0
COMP_ACSTAT0_OVAL
Comparator Output Value
1
2
ACSTAT1
Analog Comparator Status 1
0x40
-1
read-write
n
0x0
0x0
COMP_ACSTAT1_OVAL
Comparator Output Value
1
2
COMPACCTL0
Analog Comparator Control 0
0x24
read-write
n
0x0
0x0
COMP_ACCTL0_ASRCP
Analog Source Positive
9
11
COMP_ACCTL0_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL0_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL0_ASRCP_REF
Internal voltage reference (VIREF)
0x2
COMP_ACCTL0_CINV
Comparator Output Invert
1
2
COMP_ACCTL0_ISEN
Interrupt Sense
2
4
COMP_ACCTL0_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL0_ISEN_FALL
Falling edge
0x1
COMP_ACCTL0_ISEN_RISE
Rising edge
0x2
COMP_ACCTL0_ISEN_BOTH
Either edge
0x3
COMP_ACCTL0_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL0_TOEN
Trigger Output Enable
11
12
COMP_ACCTL0_TSEN
Trigger Sense
5
7
COMP_ACCTL0_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL0_TSEN_FALL
Falling edge
0x1
COMP_ACCTL0_TSEN_RISE
Rising edge
0x2
COMP_ACCTL0_TSEN_BOTH
Either edge
0x3
COMP_ACCTL0_TSLVAL
Trigger Sense Level Value
7
8
COMPACCTL1
Analog Comparator Control 1
0x44
read-write
n
0x0
0x0
COMP_ACCTL1_ASRCP
Analog Source Positive
9
11
COMP_ACCTL1_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL1_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL1_ASRCP_REF
Internal voltage reference (VIREF)
0x2
COMP_ACCTL1_CINV
Comparator Output Invert
1
2
COMP_ACCTL1_ISEN
Interrupt Sense
2
4
COMP_ACCTL1_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL1_ISEN_FALL
Falling edge
0x1
COMP_ACCTL1_ISEN_RISE
Rising edge
0x2
COMP_ACCTL1_ISEN_BOTH
Either edge
0x3
COMP_ACCTL1_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL1_TOEN
Trigger Output Enable
11
12
COMP_ACCTL1_TSEN
Trigger Sense
5
7
COMP_ACCTL1_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL1_TSEN_FALL
Falling edge
0x1
COMP_ACCTL1_TSEN_RISE
Rising edge
0x2
COMP_ACCTL1_TSEN_BOTH
Either edge
0x3
COMP_ACCTL1_TSLVAL
Trigger Sense Level Value
7
8
COMPACINTEN
Analog Comparator Interrupt Enable
0x8
read-write
n
0x0
0x0
COMP_ACINTEN_IN0
Comparator 0 Interrupt Enable
0
1
COMP_ACINTEN_IN1
Comparator 1 Interrupt Enable
1
2
COMPACMIS
Analog Comparator Masked Interrupt Status
0x0
read-write
n
0x0
0x0
COMP_ACMIS_IN0
Comparator 0 Masked Interrupt Status
0
1
COMP_ACMIS_IN1
Comparator 1 Masked Interrupt Status
1
2
COMPACREFCTL
Analog Comparator Reference Voltage Control
0x10
read-write
n
0x0
0x0
COMP_ACREFCTL_EN
Resistor Ladder Enable
9
10
COMP_ACREFCTL_RNG
Resistor Ladder Range
8
9
COMP_ACREFCTL_VREF
Resistor Ladder Voltage Ref
0
4
COMPACRIS
Analog Comparator Raw Interrupt Status
0x4
read-write
n
0x0
0x0
COMP_ACRIS_IN0
Comparator 0 Interrupt Status
0
1
COMP_ACRIS_IN1
Comparator 1 Interrupt Status
1
2
COMPACSTAT0
Analog Comparator Status 0
0x20
read-write
n
0x0
0x0
COMP_ACSTAT0_OVAL
Comparator Output Value
1
2
COMPACSTAT1
Analog Comparator Status 1
0x40
read-write
n
0x0
0x0
COMP_ACSTAT1_OVAL
Comparator Output Value
1
2
COMPPP
Analog Comparator Peripheral Properties
0xFC0
read-write
n
0x0
0x0
COMP_PP_C0O
Comparator Output 0 Present
16
17
COMP_PP_C1O
Comparator Output 1 Present
17
18
COMP_PP_C2O
Comparator Output 2 Present
18
19
COMP_PP_CMP0
Comparator 0 Present
0
1
COMP_PP_CMP1
Comparator 1 Present
1
2
COMP_PP_CMP2
Comparator 2 Present
2
3
PP
Analog Comparator Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
COMP_PP_C0O
Comparator Output 0 Present
16
17
COMP_PP_C1O
Comparator Output 1 Present
17
18
COMP_PP_C2O
Comparator Output 2 Present
18
19
COMP_PP_CMP0
Comparator 0 Present
0
1
COMP_PP_CMP1
Comparator 1 Present
1
2
COMP_PP_CMP2
Comparator 2 Present
2
3
EEPROM
Register map for EEPROM peripheral
EEPROM
0x0
0x0
0x1000
registers
n
EEBLOCK
EEPROM Current Block
0x4
-1
read-write
n
0x0
0x0
EEPROM_EEBLOCK_BLOCK
Current Block
0
16
EEDBGME
EEPROM Debug Mass Erase
0x80
-1
read-write
n
0x0
0x0
EEPROM_EEDBGME_KEY
Erase Key
16
32
EEPROM_EEDBGME_ME
Mass Erase
0
1
EEDONE
EEPROM Done Status
0x18
-1
read-write
n
0x0
0x0
EEPROM_EEDONE_INVPL
Invalid Program Voltage Level
8
9
EEPROM_EEDONE_NOPERM
Write Without Permission
4
5
EEPROM_EEDONE_WKCOPY
Working on a Copy
3
4
EEPROM_EEDONE_WKERASE
Working on an Erase
2
3
EEPROM_EEDONE_WORKING
EEPROM Working
0
1
EEPROM_EEDONE_WRBUSY
Write Busy
5
6
EEHIDE
EEPROM Block Hide
0x50
-1
read-write
n
0x0
0x0
EEPROM_EEHIDE_HN
Hide Block
1
32
EEINT
EEPROM Interrupt
0x40
-1
read-write
n
0x0
0x0
EEPROM_EEINT_INT
Interrupt Enable
0
1
EEOFFSET
EEPROM Current Offset
0x8
-1
read-write
n
0x0
0x0
EEPROM_EEOFFSET_OFFSET
Current Address Offset
0
4
EEPASS0
EEPROM Password
0x34
-1
read-write
n
0x0
0x0
EEPROM_EEPASS0_PASS
Password
0
32
EEPASS1
EEPROM Password
0x38
-1
read-write
n
0x0
0x0
EEPROM_EEPASS1_PASS
Password
0
32
EEPASS2
EEPROM Password
0x3C
-1
read-write
n
0x0
0x0
EEPROM_EEPASS2_PASS
Password
0
32
EEPROMEEBLOCK
EEPROM Current Block
0x4
read-write
n
0x0
0x0
EEPROM_EEBLOCK_BLOCK
Current Block
0
16
EEPROMEEDBGME
EEPROM Debug Mass Erase
0x80
read-write
n
0x0
0x0
EEPROM_EEDBGME_KEY
Erase Key
16
32
EEPROM_EEDBGME_ME
Mass Erase
0
1
EEPROMEEDONE
EEPROM Done Status
0x18
read-write
n
0x0
0x0
EEPROM_EEDONE_INVPL
Invalid Program Voltage Level
8
9
EEPROM_EEDONE_NOPERM
Write Without Permission
4
5
EEPROM_EEDONE_WKCOPY
Working on a Copy
3
4
EEPROM_EEDONE_WKERASE
Working on an Erase
2
3
EEPROM_EEDONE_WORKING
EEPROM Working
0
1
EEPROM_EEDONE_WRBUSY
Write Busy
5
6
EEPROMEEHIDE
EEPROM Block Hide
0x50
read-write
n
0x0
0x0
EEPROM_EEHIDE_HN
Hide Block
1
32
EEPROMEEINT
EEPROM Interrupt
0x40
read-write
n
0x0
0x0
EEPROM_EEINT_INT
Interrupt Enable
0
1
EEPROMEEOFFSET
EEPROM Current Offset
0x8
read-write
n
0x0
0x0
EEPROM_EEOFFSET_OFFSET
Current Address Offset
0
4
EEPROMEEPASS0
EEPROM Password
0x34
read-write
n
0x0
0x0
EEPROM_EEPASS0_PASS
Password
0
32
EEPROMEEPASS1
EEPROM Password
0x38
read-write
n
0x0
0x0
EEPROM_EEPASS1_PASS
Password
0
32
EEPROMEEPASS2
EEPROM Password
0x3C
read-write
n
0x0
0x0
EEPROM_EEPASS2_PASS
Password
0
32
EEPROMEEPROMPP
EEPROM
0xFC0
read-write
n
0x0
0x0
EEPROM_EEPROMPP_SIZE
EEPROM Size
0
5
EEPROMEEPROT
EEPROM Protection
0x30
read-write
n
0x0
0x0
EEPROM_EEPROT_ACC
Access Control
3
4
EEPROM_EEPROT_PROT
Protection Control
0
3
EEPROM_EEPROT_PROT_RWNPW
This setting is the default. If there is no password, the block is not protected and is readable and writable
0x0
EEPROM_EEPROT_PROT_RWPW
If there is a password, the block is readable or writable only when unlocked
0x1
EEPROM_EEPROT_PROT_RONPW
If there is no password, the block is readable, not writable
0x2
EEPROMEERDWR
EEPROM Read-Write
0x10
read-write
n
0x0
0x0
EEPROM_EERDWR_VALUE
EEPROM Read or Write Data
0
32
EEPROMEERDWRINC
EEPROM Read-Write with Increment
0x14
read-write
n
0x0
0x0
EEPROM_EERDWRINC_VALUE
EEPROM Read or Write Data with Increment
0
32
EEPROMEESIZE
EEPROM Size Information
0x0
read-write
n
0x0
0x0
EEPROM_EESIZE_BLKCNT
Number of 16-Word Blocks
16
27
EEPROM_EESIZE_WORDCNT
Number of 32-Bit Words
0
16
EEPROMEESUPP
EEPROM Support Control and Status
0x1C
read-write
n
0x0
0x0
EEPROM_EESUPP_EREQ
Erase Required
1
2
EEPROM_EESUPP_ERETRY
Erase Must Be Retried
2
3
EEPROM_EESUPP_PRETRY
Programming Must Be Retried
3
4
EEPROM_EESUPP_START
Start Erase
0
1
EEPROMEEUNLOCK
EEPROM Unlock
0x20
read-write
n
0x0
0x0
EEPROM_EEUNLOCK_UNLOCK
EEPROM Unlock
0
32
EEPROMPP
EEPROM
0xFC0
-1
read-write
n
0x0
0x0
EEPROM_EEPROMPP_SIZE
EEPROM Size
0
5
EEPROT
EEPROM Protection
0x30
-1
read-write
n
0x0
0x0
EEPROM_EEPROT_ACC
Access Control
3
4
EEPROM_EEPROT_PROT
Protection Control
0
3
EEPROM_EEPROT_PROT_RWNPW
This setting is the default. If there is no password, the block is not protected and is readable and writable
0x0
EEPROM_EEPROT_PROT_RWPW
If there is a password, the block is readable or writable only when unlocked
0x1
EEPROM_EEPROT_PROT_RONPW
If there is no password, the block is readable, not writable
0x2
EERDWR
EEPROM Read-Write
0x10
-1
read-write
n
0x0
0x0
EEPROM_EERDWR_VALUE
EEPROM Read or Write Data
0
32
EERDWRINC
EEPROM Read-Write with Increment
0x14
-1
read-write
n
0x0
0x0
EEPROM_EERDWRINC_VALUE
EEPROM Read or Write Data with Increment
0
32
EESIZE
EEPROM Size Information
0x0
-1
read-write
n
0x0
0x0
EEPROM_EESIZE_BLKCNT
Number of 16-Word Blocks
16
27
EEPROM_EESIZE_WORDCNT
Number of 32-Bit Words
0
16
EESUPP
EEPROM Support Control and Status
0x1C
-1
read-write
n
0x0
0x0
EEPROM_EESUPP_EREQ
Erase Required
1
2
EEPROM_EESUPP_ERETRY
Erase Must Be Retried
2
3
EEPROM_EESUPP_PRETRY
Programming Must Be Retried
3
4
EEPROM_EESUPP_START
Start Erase
0
1
EEUNLOCK
EEPROM Unlock
0x20
-1
read-write
n
0x0
0x0
EEPROM_EEUNLOCK_UNLOCK
EEPROM Unlock
0
32
FLASH_CTRL
Register map for FLASH_CTRL peripheral
FLASH_CTRL
0x0
0x0
0x1000
registers
n
0x1000
0x1000
registers
n
BOOTCFG
Boot Configuration
0x11D0
-1
read-write
n
0x0
0x0
FLASH_BOOTCFG_DBG0
Debug Control 0
0
1
FLASH_BOOTCFG_DBG1
Debug Control 1
1
2
FLASH_BOOTCFG_EN
Boot GPIO Enable
8
9
FLASH_BOOTCFG_NW
Not Written
31
32
FLASH_BOOTCFG_PIN
Boot GPIO Pin
10
13
FLASH_BOOTCFG_PIN_0
Pin 0
0x0
FLASH_BOOTCFG_PIN_1
Pin 1
0x1
FLASH_BOOTCFG_PIN_2
Pin 2
0x2
FLASH_BOOTCFG_PIN_3
Pin 3
0x3
FLASH_BOOTCFG_PIN_4
Pin 4
0x4
FLASH_BOOTCFG_PIN_5
Pin 5
0x5
FLASH_BOOTCFG_PIN_6
Pin 6
0x6
FLASH_BOOTCFG_PIN_7
Pin 7
0x7
FLASH_BOOTCFG_POL
Boot GPIO Polarity
9
10
FLASH_BOOTCFG_PORT
Boot GPIO Port
13
16
FLASH_BOOTCFG_PORT_A
Port A
0x0
FLASH_BOOTCFG_PORT_B
Port B
0x1
FLASH_BOOTCFG_PORT_C
Port C
0x2
FLASH_BOOTCFG_PORT_D
Port D
0x3
FLASH_BOOTCFG_PORT_E
Port E
0x4
FLASH_BOOTCFG_PORT_F
Port F
0x5
FLASH_BOOTCFG_PORT_G
Port G
0x6
FLASH_BOOTCFG_PORT_H
Port H
0x7
FCIM
Flash Controller Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
FLASH_FCIM_AMASK
Access Interrupt Mask
0
1
FLASH_FCIM_EMASK
EEPROM Interrupt Mask
2
3
FLASH_FCIM_ERMASK
ERVER Interrupt Mask
11
12
FLASH_FCIM_INVDMASK
Invalid Data Interrupt Mask
10
11
FLASH_FCIM_PMASK
Programming Interrupt Mask
1
2
FLASH_FCIM_PROGMASK
PROGVER Interrupt Mask
13
14
FLASH_FCIM_VOLTMASK
VOLT Interrupt Mask
9
10
FCMISC
Flash Controller Masked Interrupt Status and Clear
0x14
-1
read-write
n
0x0
0x0
FLASH_FCMISC_AMISC
Access Masked Interrupt Status and Clear
0
1
FLASH_FCMISC_EMISC
EEPROM Masked Interrupt Status and Clear
2
3
FLASH_FCMISC_ERMISC
ERVER Masked Interrupt Status and Clear
11
12
FLASH_FCMISC_INVDMISC
Invalid Data Masked Interrupt Status and Clear
10
11
FLASH_FCMISC_PMISC
Programming Masked Interrupt Status and Clear
1
2
FLASH_FCMISC_PROGMISC
PROGVER Masked Interrupt Status and Clear
13
14
FLASH_FCMISC_VOLTMISC
VOLT Masked Interrupt Status and Clear
9
10
FCRIS
Flash Controller Raw Interrupt Status
0xC
-1
read-write
n
0x0
0x0
FLASH_FCRIS_ARIS
Access Raw Interrupt Status
0
1
FLASH_FCRIS_ERIS
EEPROM Raw Interrupt Status
2
3
FLASH_FCRIS_ERRIS
ERVER Raw Interrupt Status
11
12
FLASH_FCRIS_INVDRIS
Invalid Data Raw Interrupt Status
10
11
FLASH_FCRIS_PRIS
Programming Raw Interrupt Status
1
2
FLASH_FCRIS_PROGRIS
PROGVER Raw Interrupt Status
13
14
FLASH_FCRIS_VOLTRIS
VOLTSTAT Raw Interrupt Status
9
10
FLASH_CTRLBOOTCFG
Boot Configuration
0x11D0
read-write
n
0x0
0x0
FLASH_BOOTCFG_DBG0
Debug Control 0
0
1
FLASH_BOOTCFG_DBG1
Debug Control 1
1
2
FLASH_BOOTCFG_EN
Boot GPIO Enable
8
9
FLASH_BOOTCFG_NW
Not Written
31
32
FLASH_BOOTCFG_PIN
Boot GPIO Pin
10
13
FLASH_BOOTCFG_PIN_0
Pin 0
0x0
FLASH_BOOTCFG_PIN_1
Pin 1
0x1
FLASH_BOOTCFG_PIN_2
Pin 2
0x2
FLASH_BOOTCFG_PIN_3
Pin 3
0x3
FLASH_BOOTCFG_PIN_4
Pin 4
0x4
FLASH_BOOTCFG_PIN_5
Pin 5
0x5
FLASH_BOOTCFG_PIN_6
Pin 6
0x6
FLASH_BOOTCFG_PIN_7
Pin 7
0x7
FLASH_BOOTCFG_POL
Boot GPIO Polarity
9
10
FLASH_BOOTCFG_PORT
Boot GPIO Port
13
16
FLASH_BOOTCFG_PORT_A
Port A
0x0
FLASH_BOOTCFG_PORT_B
Port B
0x1
FLASH_BOOTCFG_PORT_C
Port C
0x2
FLASH_BOOTCFG_PORT_D
Port D
0x3
FLASH_BOOTCFG_PORT_E
Port E
0x4
FLASH_BOOTCFG_PORT_F
Port F
0x5
FLASH_BOOTCFG_PORT_G
Port G
0x6
FLASH_BOOTCFG_PORT_H
Port H
0x7
FLASH_CTRLFCIM
Flash Controller Interrupt Mask
0x10
read-write
n
0x0
0x0
FLASH_FCIM_AMASK
Access Interrupt Mask
0
1
FLASH_FCIM_EMASK
EEPROM Interrupt Mask
2
3
FLASH_FCIM_ERMASK
ERVER Interrupt Mask
11
12
FLASH_FCIM_INVDMASK
Invalid Data Interrupt Mask
10
11
FLASH_FCIM_PMASK
Programming Interrupt Mask
1
2
FLASH_FCIM_PROGMASK
PROGVER Interrupt Mask
13
14
FLASH_FCIM_VOLTMASK
VOLT Interrupt Mask
9
10
FLASH_CTRLFCMISC
Flash Controller Masked Interrupt Status and Clear
0x14
read-write
n
0x0
0x0
FLASH_FCMISC_AMISC
Access Masked Interrupt Status and Clear
0
1
FLASH_FCMISC_EMISC
EEPROM Masked Interrupt Status and Clear
2
3
FLASH_FCMISC_ERMISC
ERVER Masked Interrupt Status and Clear
11
12
FLASH_FCMISC_INVDMISC
Invalid Data Masked Interrupt Status and Clear
10
11
FLASH_FCMISC_PMISC
Programming Masked Interrupt Status and Clear
1
2
FLASH_FCMISC_PROGMISC
PROGVER Masked Interrupt Status and Clear
13
14
FLASH_FCMISC_VOLTMISC
VOLT Masked Interrupt Status and Clear
9
10
FLASH_CTRLFCRIS
Flash Controller Raw Interrupt Status
0xC
read-write
n
0x0
0x0
FLASH_FCRIS_ARIS
Access Raw Interrupt Status
0
1
FLASH_FCRIS_ERIS
EEPROM Raw Interrupt Status
2
3
FLASH_FCRIS_ERRIS
ERVER Raw Interrupt Status
11
12
FLASH_FCRIS_INVDRIS
Invalid Data Raw Interrupt Status
10
11
FLASH_FCRIS_PRIS
Programming Raw Interrupt Status
1
2
FLASH_FCRIS_PROGRIS
PROGVER Raw Interrupt Status
13
14
FLASH_FCRIS_VOLTRIS
VOLTSTAT Raw Interrupt Status
9
10
FLASH_CTRLFMA
Flash Memory Address
0x0
read-write
n
0x0
0x0
FLASH_FMA_OFFSET
Address Offset
0
16
FLASH_CTRLFMC
Flash Memory Control
0x8
read-write
n
0x0
0x0
FLASH_FMC_COMT
Commit Register Value
3
4
FLASH_FMC_ERASE
Erase a Page of Flash Memory
1
2
FLASH_FMC_MERASE
Mass Erase Flash Memory
2
3
FLASH_FMC_WRITE
Write a Word into Flash Memory
0
1
FLASH_FMC_WRKEY
FLASH write key
17
32
FLASH_CTRLFMC2
Flash Memory Control 2
0x20
read-write
n
0x0
0x0
FLASH_FMC2_WRBUF
Buffered Flash Memory Write
0
1
FLASH_FMC2_WRKEY
FLASH write key
17
32
FLASH_CTRLFMD
Flash Memory Data
0x4
read-write
n
0x0
0x0
FLASH_FMD_DATA
Data Value
0
32
FLASH_CTRLFMPPE0
Flash Memory Protection Program Enable 0
0x1400
read-write
n
0x0
0x0
FLASH_CTRLFMPRE0
Flash Memory Protection Read Enable 0
0x1200
read-write
n
0x0
0x0
FLASH_CTRLFSIZE
Flash Size
0xFC0
read-write
n
0x0
0x0
FLASH_FSIZE_SIZE
Flash Size
0
16
FLASH_FSIZE_SIZE_64KB
64 KB of Flash
0x1f
FLASH_FSIZE_SIZE_96KB
96 KB of Flash
0x2f
FLASH_FSIZE_SIZE_8KB
8 KB of Flash
0x3
FLASH_FSIZE_SIZE_128KB
128 KB of Flash
0x3f
FLASH_FSIZE_SIZE_192KB
192 KB of Flash
0x5f
FLASH_FSIZE_SIZE_16KB
16 KB of Flash
0x7
FLASH_FSIZE_SIZE_256KB
256 KB of Flash
0x7f
FLASH_FSIZE_SIZE_32KB
32 KB of Flash
0xf
FLASH_CTRLFWBN
Flash Write Buffer n
0x100
read-write
n
0x0
0x0
FLASH_FWBN_DATA
Data
0
32
FLASH_CTRLFWBVAL
Flash Write Buffer Valid
0x30
read-write
n
0x0
0x0
FLASH_FWBVAL_FWB
Flash Memory Write Buffer
0
32
FLASH_CTRLRMCTL
ROM Control
0x10F0
read-write
n
0x0
0x0
FLASH_RMCTL_BA
Boot Alias
0
1
FLASH_CTRLROMSWMAP
ROM Software Map
0xFCC
read-write
n
0x0
0x0
FLASH_ROMSWMAP_SAFERTOS
SafeRTOS Present
0
1
FLASH_CTRLSSIZE
SRAM Size
0xFC4
read-write
n
0x0
0x0
FLASH_SSIZE_SIZE
SRAM Size
0
16
FLASH_SSIZE_SIZE_6KB
6 KB of SRAM
0x17
FLASH_SSIZE_SIZE_8KB
8 KB of SRAM
0x1f
FLASH_SSIZE_SIZE_12KB
12 KB of SRAM
0x2f
FLASH_SSIZE_SIZE_16KB
16 KB of SRAM
0x3f
FLASH_SSIZE_SIZE_20KB
20 KB of SRAM
0x4f
FLASH_SSIZE_SIZE_24KB
24 KB of SRAM
0x5f
FLASH_SSIZE_SIZE_2KB
2 KB of SRAM
0x7
FLASH_SSIZE_SIZE_32KB
32 KB of SRAM
0x7f
FLASH_SSIZE_SIZE_4KB
4 KB of SRAM
0xf
FLASH_CTRLUSERREG0
User Register 0
0x11E0
read-write
n
0x0
0x0
FLASH_USERREG0_DATA
User Data
0
31
FLASH_USERREG0_NW
Not Written
31
32
FLASH_CTRLUSERREG1
User Register 1
0x11E4
read-write
n
0x0
0x0
FLASH_USERREG1_DATA
User Data
0
31
FLASH_USERREG1_NW
Not Written
31
32
FLASH_CTRLUSERREG2
User Register 2
0x11E8
read-write
n
0x0
0x0
FLASH_USERREG2_DATA
User Data
0
31
FLASH_USERREG2_NW
Not Written
31
32
FLASH_CTRLUSERREG3
User Register 3
0x11EC
read-write
n
0x0
0x0
FLASH_USERREG3_DATA
User Data
0
31
FLASH_USERREG3_NW
Not Written
31
32
FMA
Flash Memory Address
0x0
-1
read-write
n
0x0
0x0
FLASH_FMA_OFFSET
Address Offset
0
16
FMC
Flash Memory Control
0x8
-1
read-write
n
0x0
0x0
FLASH_FMC_COMT
Commit Register Value
3
4
FLASH_FMC_ERASE
Erase a Page of Flash Memory
1
2
FLASH_FMC_MERASE
Mass Erase Flash Memory
2
3
FLASH_FMC_WRITE
Write a Word into Flash Memory
0
1
FLASH_FMC_WRKEY
FLASH write key
17
32
FMC2
Flash Memory Control 2
0x20
-1
read-write
n
0x0
0x0
FLASH_FMC2_WRBUF
Buffered Flash Memory Write
0
1
FLASH_FMC2_WRKEY
FLASH write key
17
32
FMD
Flash Memory Data
0x4
-1
read-write
n
0x0
0x0
FLASH_FMD_DATA
Data Value
0
32
FMPPE0
Flash Memory Protection Program Enable 0
0x1400
-1
read-write
n
0x0
0x0
FMPRE0
Flash Memory Protection Read Enable 0
0x1200
-1
read-write
n
0x0
0x0
FSIZE
Flash Size
0xFC0
-1
read-write
n
0x0
0x0
FLASH_FSIZE_SIZE
Flash Size
0
16
FLASH_FSIZE_SIZE_64KB
64 KB of Flash
0x1f
FLASH_FSIZE_SIZE_96KB
96 KB of Flash
0x2f
FLASH_FSIZE_SIZE_8KB
8 KB of Flash
0x3
FLASH_FSIZE_SIZE_128KB
128 KB of Flash
0x3f
FLASH_FSIZE_SIZE_192KB
192 KB of Flash
0x5f
FLASH_FSIZE_SIZE_16KB
16 KB of Flash
0x7
FLASH_FSIZE_SIZE_256KB
256 KB of Flash
0x7f
FLASH_FSIZE_SIZE_32KB
32 KB of Flash
0xf
FWBN
Flash Write Buffer n
0x100
-1
read-write
n
0x0
0x0
FLASH_FWBN_DATA
Data
0
32
FWBVAL
Flash Write Buffer Valid
0x30
-1
read-write
n
0x0
0x0
FLASH_FWBVAL_FWB
Flash Memory Write Buffer
0
32
RMCTL
ROM Control
0x10F0
-1
read-write
n
0x0
0x0
FLASH_RMCTL_BA
Boot Alias
0
1
ROMSWMAP
ROM Software Map
0xFCC
-1
read-write
n
0x0
0x0
FLASH_ROMSWMAP_SAFERTOS
SafeRTOS Present
0
1
SSIZE
SRAM Size
0xFC4
-1
read-write
n
0x0
0x0
FLASH_SSIZE_SIZE
SRAM Size
0
16
FLASH_SSIZE_SIZE_6KB
6 KB of SRAM
0x17
FLASH_SSIZE_SIZE_8KB
8 KB of SRAM
0x1f
FLASH_SSIZE_SIZE_12KB
12 KB of SRAM
0x2f
FLASH_SSIZE_SIZE_16KB
16 KB of SRAM
0x3f
FLASH_SSIZE_SIZE_20KB
20 KB of SRAM
0x4f
FLASH_SSIZE_SIZE_24KB
24 KB of SRAM
0x5f
FLASH_SSIZE_SIZE_2KB
2 KB of SRAM
0x7
FLASH_SSIZE_SIZE_32KB
32 KB of SRAM
0x7f
FLASH_SSIZE_SIZE_4KB
4 KB of SRAM
0xf
USERREG0
User Register 0
0x11E0
-1
read-write
n
0x0
0x0
FLASH_USERREG0_DATA
User Data
0
31
FLASH_USERREG0_NW
Not Written
31
32
USERREG1
User Register 1
0x11E4
-1
read-write
n
0x0
0x0
FLASH_USERREG1_DATA
User Data
0
31
FLASH_USERREG1_NW
Not Written
31
32
USERREG2
User Register 2
0x11E8
-1
read-write
n
0x0
0x0
FLASH_USERREG2_DATA
User Data
0
31
FLASH_USERREG2_NW
Not Written
31
32
USERREG3
User Register 3
0x11EC
-1
read-write
n
0x0
0x0
FLASH_USERREG3_DATA
User Data
0
31
FLASH_USERREG3_NW
Not Written
31
32
GPIO_PORTA
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTA_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTB_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTC
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTC_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTD
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTD_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTE
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTE_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTF
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTF_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTG
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIO_PORTG_AHB
Register map for GPIO_PORTA peripheral
GPIO_PORT
0x0
0x0
0x1000
registers
n
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-only
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIO_PORTAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIO_PORTAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIO_PORTAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIO_PORTACR
GPIO Commit
0x524
read-only
n
0x0
0x0
GPIO_PORTADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIO_PORTADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIO_PORTADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIO_PORTADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIO_PORTADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIO_PORTADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIO_PORTADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIO_PORTAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIO_PORTAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_PORTAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIO_PORTAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_PORTAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIO_PORTALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIO_PORTAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_PORTAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIO_PORTAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIO_PORTAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIO_PORTAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIO_PORTARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_PORTASI
GPIO Select Interrupt
0x538
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
GPIO_PORTASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
SI
GPIO Select Interrupt
0x538
-1
read-write
n
0x0
0x0
GPIO_SI_SUM
Summary Interrupt
0
1
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
I2C0
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C1
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C2
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C3
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C4
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C5
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
Data Transferred
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_TPR
SCL Clock Period
0
7
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
NVIC
Register map for NVIC peripheral
NVIC
0x0
0x0
0x1000
registers
n
ACTIVE0
Interrupt 0-31 Active Bit
0x300
-1
read-write
n
0x0
0x0
NVIC_ACTIVE0_INT
Interrupt Active
0
32
NVIC_ACTIVE0_INT0
Interrupt 0 active
0x1
NVIC_ACTIVE0_INT4
Interrupt 4 active
0x10
NVIC_ACTIVE0_INT8
Interrupt 8 active
0x100
NVIC_ACTIVE0_INT12
Interrupt 12 active
0x1000
NVIC_ACTIVE0_INT16
Interrupt 16 active
0x10000
NVIC_ACTIVE0_INT20
Interrupt 20 active
0x100000
NVIC_ACTIVE0_INT24
Interrupt 24 active
0x1000000
NVIC_ACTIVE0_INT28
Interrupt 28 active
0x10000000
NVIC_ACTIVE0_INT1
Interrupt 1 active
0x2
NVIC_ACTIVE0_INT5
Interrupt 5 active
0x20
NVIC_ACTIVE0_INT9
Interrupt 9 active
0x200
NVIC_ACTIVE0_INT13
Interrupt 13 active
0x2000
NVIC_ACTIVE0_INT17
Interrupt 17 active
0x20000
NVIC_ACTIVE0_INT21
Interrupt 21 active
0x200000
NVIC_ACTIVE0_INT25
Interrupt 25 active
0x2000000
NVIC_ACTIVE0_INT29
Interrupt 29 active
0x20000000
NVIC_ACTIVE0_INT2
Interrupt 2 active
0x4
NVIC_ACTIVE0_INT6
Interrupt 6 active
0x40
NVIC_ACTIVE0_INT10
Interrupt 10 active
0x400
NVIC_ACTIVE0_INT14
Interrupt 14 active
0x4000
NVIC_ACTIVE0_INT18
Interrupt 18 active
0x40000
NVIC_ACTIVE0_INT22
Interrupt 22 active
0x400000
NVIC_ACTIVE0_INT26
Interrupt 26 active
0x4000000
NVIC_ACTIVE0_INT30
Interrupt 30 active
0x40000000
NVIC_ACTIVE0_INT3
Interrupt 3 active
0x8
NVIC_ACTIVE0_INT7
Interrupt 7 active
0x80
NVIC_ACTIVE0_INT11
Interrupt 11 active
0x800
NVIC_ACTIVE0_INT15
Interrupt 15 active
0x8000
NVIC_ACTIVE0_INT19
Interrupt 19 active
0x80000
NVIC_ACTIVE0_INT23
Interrupt 23 active
0x800000
NVIC_ACTIVE0_INT27
Interrupt 27 active
0x8000000
NVIC_ACTIVE0_INT31
Interrupt 31 active
0x80000000
ACTIVE1
Interrupt 32-54 Active Bit
0x304
-1
read-write
n
0x0
0x0
NVIC_ACTIVE1_INT
Interrupt Active
0
32
ACTIVE2
Interrupt 64-95 Active Bit
0x308
-1
read-write
n
0x0
0x0
NVIC_ACTIVE2_INT
Interrupt Active
0
32
ACTIVE3
Interrupt 96-127 Active Bit
0x30C
-1
read-write
n
0x0
0x0
NVIC_ACTIVE3_INT
Interrupt Active
0
32
ACTIVE4
Interrupt 128-131 Active Bit
0x310
-1
read-write
n
0x0
0x0
NVIC_ACTIVE4_INT
Interrupt Active
0
4
ACTLR
Auxiliary Control
0x8
-1
read-write
n
0x0
0x0
NVIC_ACTLR_DISFOLD
Disable IT Folding
2
3
NVIC_ACTLR_DISFPCA
Disable CONTROL
8
9
NVIC_ACTLR_DISMCYC
Disable Interrupts of Multiple Cycle Instructions
0
1
NVIC_ACTLR_DISOOFP
Disable Out-Of-Order Floating Point
9
10
NVIC_ACTLR_DISWBUF
Disable Write Buffer
1
2
APINT
Application Interrupt and Reset Control
0xD0C
-1
read-write
n
0x0
0x0
NVIC_APINT_ENDIANESS
Data Endianess
15
16
NVIC_APINT_PRIGROUP
Interrupt Priority Grouping
8
11
NVIC_APINT_PRIGROUP_7_1
Priority group 7.1 split
0x0
NVIC_APINT_PRIGROUP_6_2
Priority group 6.2 split
0x1
NVIC_APINT_PRIGROUP_5_3
Priority group 5.3 split
0x2
NVIC_APINT_PRIGROUP_4_4
Priority group 4.4 split
0x3
NVIC_APINT_PRIGROUP_3_5
Priority group 3.5 split
0x4
NVIC_APINT_PRIGROUP_2_6
Priority group 2.6 split
0x5
NVIC_APINT_PRIGROUP_1_7
Priority group 1.7 split
0x6
NVIC_APINT_PRIGROUP_0_8
Priority group 0.8 split
0x7
NVIC_APINT_SYSRESETREQ
System Reset Request
2
3
NVIC_APINT_VECTKEY
Register Key
16
32
NVIC_APINT_VECTKEY
Vector key
0x5fa
NVIC_APINT_VECT_CLR_ACT
Clear Active NMI / Fault
1
2
NVIC_APINT_VECT_RESET
System Reset
0
1
CFG_CTRL
Configuration and Control
0xD14
-1
read-write
n
0x0
0x0
NVIC_CFG_CTRL_BASE_THR
Thread State Control
0
1
NVIC_CFG_CTRL_BFHFNMIGN
Ignore Bus Fault in NMI and Fault
8
9
NVIC_CFG_CTRL_DIV0
Trap on Divide by 0
4
5
NVIC_CFG_CTRL_MAIN_PEND
Allow Main Interrupt Trigger
1
2
NVIC_CFG_CTRL_STKALIGN
Stack Alignment on Exception Entry
9
10
NVIC_CFG_CTRL_UNALIGNED
Trap on Unaligned Access
3
4
CPAC
Coprocessor Access Control
0xD88
-1
read-write
n
0x0
0x0
NVIC_CPAC_CP10
CP10 Coprocessor Access Privilege
20
22
NVIC_CPAC_CP10_DIS
Access Denied
0x0
NVIC_CPAC_CP10_PRIV
Privileged Access Only
0x1
NVIC_CPAC_CP10_FULL
Full Access
0x3
NVIC_CPAC_CP11
CP11 Coprocessor Access Privilege
22
24
NVIC_CPAC_CP11_DIS
Access Denied
0x0
NVIC_CPAC_CP11_PRIV
Privileged Access Only
0x1
NVIC_CPAC_CP11_FULL
Full Access
0x3
CPUID
CPU ID Base
0xD00
-1
read-write
n
0x0
0x0
NVIC_CPUID_CON
Constant
16
20
NVIC_CPUID_IMP
Implementer Code
24
32
NVIC_CPUID_IMP_ARM
ARM
0x41
NVIC_CPUID_PARTNO
Part Number
4
16
NVIC_CPUID_PARTNO_CM4
Cortex-M4 processor
0xc24
NVIC_CPUID_REV
Revision Number
0
4
NVIC_CPUID_VAR
Variant Number
20
24
DBG_CTRL
Debug Control and Status Reg
0xDF0
-1
read-write
n
0x0
0x0
NVIC_DBG_CTRL_C_DEBUGEN
Enable debug
0
1
NVIC_DBG_CTRL_C_HALT
Halt the core
1
2
NVIC_DBG_CTRL_C_MASKINT
Mask interrupts when stepping
3
4
NVIC_DBG_CTRL_C_SNAPSTALL
Breaks a stalled load/store
5
6
NVIC_DBG_CTRL_C_STEP
Step the core
2
3
NVIC_DBG_CTRL_S_HALT
Core status on halt
17
18
NVIC_DBG_CTRL_S_LOCKUP
Core is locked up
19
20
NVIC_DBG_CTRL_S_REGRDY
Register read/write available
16
17
NVIC_DBG_CTRL_S_RESET_ST
Core has reset since last read
25
26
NVIC_DBG_CTRL_S_RETIRE_ST
Core has executed insruction since last read
24
25
NVIC_DBG_CTRL_S_SLEEP
Core is sleeping
18
19
DBG_DATA
Debug Core Register Data
0xDF8
-1
read-write
n
0x0
0x0
NVIC_DBG_DATA
Data temporary cache
0
32
DBG_INT
Debug Reset Interrupt Control
0xDFC
-1
read-write
n
0x0
0x0
NVIC_DBG_INT_BUSERR
Debug trap on bus error
8
9
NVIC_DBG_INT_CHKERR
Debug trap on usage fault check
6
7
NVIC_DBG_INT_HARDERR
Debug trap on hard fault
10
11
NVIC_DBG_INT_INTERR
Debug trap on interrupt errors
9
10
NVIC_DBG_INT_MMERR
Debug trap on mem manage fault
4
5
NVIC_DBG_INT_NOCPERR
Debug trap on coprocessor error
5
6
NVIC_DBG_INT_RESET
Core reset status
3
4
NVIC_DBG_INT_RSTPENDCLR
Clear pending core reset
2
3
NVIC_DBG_INT_RSTPENDING
Core reset is pending
1
2
NVIC_DBG_INT_RSTVCATCH
Reset vector catch
0
1
NVIC_DBG_INT_STATERR
Debug trap on usage fault state
7
8
DBG_XFER
Debug Core Reg. Transfer Select
0xDF4
-1
read-write
n
0x0
0x0
NVIC_DBG_XFER_REG_SEL
Register
0
5
NVIC_DBG_XFER_REG_R0
Register R0
0x0
NVIC_DBG_XFER_REG_R1
Register R1
0x1
NVIC_DBG_XFER_REG_FLAGS
xPSR/Flags register
0x10
NVIC_DBG_XFER_REG_MSP
Main SP
0x11
NVIC_DBG_XFER_REG_PSP
Process SP
0x12
NVIC_DBG_XFER_REG_DSP
Deep SP
0x13
NVIC_DBG_XFER_REG_CFBP
Control/Fault/BasePri/PriMask
0x14
NVIC_DBG_XFER_REG_R2
Register R2
0x2
NVIC_DBG_XFER_REG_R3
Register R3
0x3
NVIC_DBG_XFER_REG_R4
Register R4
0x4
NVIC_DBG_XFER_REG_R5
Register R5
0x5
NVIC_DBG_XFER_REG_R6
Register R6
0x6
NVIC_DBG_XFER_REG_R7
Register R7
0x7
NVIC_DBG_XFER_REG_R8
Register R8
0x8
NVIC_DBG_XFER_REG_R9
Register R9
0x9
NVIC_DBG_XFER_REG_R10
Register R10
0xa
NVIC_DBG_XFER_REG_R11
Register R11
0xb
NVIC_DBG_XFER_REG_R12
Register R12
0xc
NVIC_DBG_XFER_REG_R13
Register R13
0xd
NVIC_DBG_XFER_REG_R14
Register R14
0xe
NVIC_DBG_XFER_REG_R15
Register R15
0xf
NVIC_DBG_XFER_REG_WNR
Write or not read
16
17
DEBUG_STAT
Debug Status Register
0xD30
-1
read-write
n
0x0
0x0
NVIC_DEBUG_STAT_BKPT
Breakpoint instruction
1
2
NVIC_DEBUG_STAT_DWTTRAP
DWT match
2
3
NVIC_DEBUG_STAT_EXTRNL
EDBGRQ asserted
4
5
NVIC_DEBUG_STAT_HALTED
Halt request
0
1
NVIC_DEBUG_STAT_VCATCH
Vector catch
3
4
DIS0
Interrupt 0-31 Clear Enable
0x180
-1
read-write
n
0x0
0x0
NVIC_DIS0_INT
Interrupt Disable
0
32
NVIC_DIS0_INT0
Interrupt 0 disable
0x1
NVIC_DIS0_INT4
Interrupt 4 disable
0x10
NVIC_DIS0_INT8
Interrupt 8 disable
0x100
NVIC_DIS0_INT12
Interrupt 12 disable
0x1000
NVIC_DIS0_INT16
Interrupt 16 disable
0x10000
NVIC_DIS0_INT20
Interrupt 20 disable
0x100000
NVIC_DIS0_INT24
Interrupt 24 disable
0x1000000
NVIC_DIS0_INT28
Interrupt 28 disable
0x10000000
NVIC_DIS0_INT1
Interrupt 1 disable
0x2
NVIC_DIS0_INT5
Interrupt 5 disable
0x20
NVIC_DIS0_INT9
Interrupt 9 disable
0x200
NVIC_DIS0_INT13
Interrupt 13 disable
0x2000
NVIC_DIS0_INT17
Interrupt 17 disable
0x20000
NVIC_DIS0_INT21
Interrupt 21 disable
0x200000
NVIC_DIS0_INT25
Interrupt 25 disable
0x2000000
NVIC_DIS0_INT29
Interrupt 29 disable
0x20000000
NVIC_DIS0_INT2
Interrupt 2 disable
0x4
NVIC_DIS0_INT6
Interrupt 6 disable
0x40
NVIC_DIS0_INT10
Interrupt 10 disable
0x400
NVIC_DIS0_INT14
Interrupt 14 disable
0x4000
NVIC_DIS0_INT18
Interrupt 18 disable
0x40000
NVIC_DIS0_INT22
Interrupt 22 disable
0x400000
NVIC_DIS0_INT26
Interrupt 26 disable
0x4000000
NVIC_DIS0_INT30
Interrupt 30 disable
0x40000000
NVIC_DIS0_INT3
Interrupt 3 disable
0x8
NVIC_DIS0_INT7
Interrupt 7 disable
0x80
NVIC_DIS0_INT11
Interrupt 11 disable
0x800
NVIC_DIS0_INT15
Interrupt 15 disable
0x8000
NVIC_DIS0_INT19
Interrupt 19 disable
0x80000
NVIC_DIS0_INT23
Interrupt 23 disable
0x800000
NVIC_DIS0_INT27
Interrupt 27 disable
0x8000000
NVIC_DIS0_INT31
Interrupt 31 disable
0x80000000
DIS1
Interrupt 32-54 Clear Enable
0x184
-1
read-write
n
0x0
0x0
NVIC_DIS1_INT
Interrupt Disable
0
32
DIS2
Interrupt 64-95 Clear Enable
0x188
-1
read-write
n
0x0
0x0
NVIC_DIS2_INT
Interrupt Disable
0
32
DIS3
Interrupt 96-127 Clear Enable
0x18C
-1
read-write
n
0x0
0x0
NVIC_DIS3_INT
Interrupt Disable
0
32
DIS4
Interrupt 128-131 Clear Enable
0x190
-1
read-write
n
0x0
0x0
NVIC_DIS4_INT
Interrupt Disable
0
4
EN0
Interrupt 0-31 Set Enable
0x100
-1
read-write
n
0x0
0x0
NVIC_EN0_INT
Interrupt Enable
0
32
NVIC_EN0_INT0
Interrupt 0 enable
0x1
NVIC_EN0_INT4
Interrupt 4 enable
0x10
NVIC_EN0_INT8
Interrupt 8 enable
0x100
NVIC_EN0_INT12
Interrupt 12 enable
0x1000
NVIC_EN0_INT16
Interrupt 16 enable
0x10000
NVIC_EN0_INT20
Interrupt 20 enable
0x100000
NVIC_EN0_INT24
Interrupt 24 enable
0x1000000
NVIC_EN0_INT28
Interrupt 28 enable
0x10000000
NVIC_EN0_INT1
Interrupt 1 enable
0x2
NVIC_EN0_INT5
Interrupt 5 enable
0x20
NVIC_EN0_INT9
Interrupt 9 enable
0x200
NVIC_EN0_INT13
Interrupt 13 enable
0x2000
NVIC_EN0_INT17
Interrupt 17 enable
0x20000
NVIC_EN0_INT21
Interrupt 21 enable
0x200000
NVIC_EN0_INT25
Interrupt 25 enable
0x2000000
NVIC_EN0_INT29
Interrupt 29 enable
0x20000000
NVIC_EN0_INT2
Interrupt 2 enable
0x4
NVIC_EN0_INT6
Interrupt 6 enable
0x40
NVIC_EN0_INT10
Interrupt 10 enable
0x400
NVIC_EN0_INT14
Interrupt 14 enable
0x4000
NVIC_EN0_INT18
Interrupt 18 enable
0x40000
NVIC_EN0_INT22
Interrupt 22 enable
0x400000
NVIC_EN0_INT26
Interrupt 26 enable
0x4000000
NVIC_EN0_INT30
Interrupt 30 enable
0x40000000
NVIC_EN0_INT3
Interrupt 3 enable
0x8
NVIC_EN0_INT7
Interrupt 7 enable
0x80
NVIC_EN0_INT11
Interrupt 11 enable
0x800
NVIC_EN0_INT15
Interrupt 15 enable
0x8000
NVIC_EN0_INT19
Interrupt 19 enable
0x80000
NVIC_EN0_INT23
Interrupt 23 enable
0x800000
NVIC_EN0_INT27
Interrupt 27 enable
0x8000000
NVIC_EN0_INT31
Interrupt 31 enable
0x80000000
EN1
Interrupt 32-54 Set Enable
0x104
-1
read-write
n
0x0
0x0
NVIC_EN1_INT
Interrupt Enable
0
32
EN2
Interrupt 64-95 Set Enable
0x108
-1
read-write
n
0x0
0x0
NVIC_EN2_INT
Interrupt Enable
0
32
EN3
Interrupt 96-127 Set Enable
0x10C
-1
read-write
n
0x0
0x0
NVIC_EN3_INT
Interrupt Enable
0
32
EN4
Interrupt 128-131 Set Enable
0x110
-1
read-write
n
0x0
0x0
NVIC_EN4_INT
Interrupt Enable
0
4
FAULT_ADDR
Bus Fault Address
0xD38
-1
read-write
n
0x0
0x0
NVIC_FAULT_ADDR
Fault Address
0
32
FAULT_STAT
Configurable Fault Status
0xD28
-1
read-write
n
0x0
0x0
NVIC_FAULT_STAT_BFARV
Bus Fault Address Register Valid
15
16
NVIC_FAULT_STAT_BLSPERR
Bus Fault on Floating-Point Lazy State Preservation
13
14
NVIC_FAULT_STAT_BSTKE
Stack Bus Fault
12
13
NVIC_FAULT_STAT_BUSTKE
Unstack Bus Fault
11
12
NVIC_FAULT_STAT_DERR
Data Access Violation
1
2
NVIC_FAULT_STAT_DIV0
Divide-by-Zero Usage Fault
25
26
NVIC_FAULT_STAT_IBUS
Instruction Bus Error
8
9
NVIC_FAULT_STAT_IERR
Instruction Access Violation
0
1
NVIC_FAULT_STAT_IMPRE
Imprecise Data Bus Error
10
11
NVIC_FAULT_STAT_INVPC
Invalid PC Load Usage Fault
18
19
NVIC_FAULT_STAT_INVSTAT
Invalid State Usage Fault
17
18
NVIC_FAULT_STAT_MLSPERR
Memory Management Fault on Floating-Point Lazy State Preservation
5
6
NVIC_FAULT_STAT_MMARV
Memory Management Fault Address Register Valid
7
8
NVIC_FAULT_STAT_MSTKE
Stack Access Violation
4
5
NVIC_FAULT_STAT_MUSTKE
Unstack Access Violation
3
4
NVIC_FAULT_STAT_NOCP
No Coprocessor Usage Fault
19
20
NVIC_FAULT_STAT_PRECISE
Precise Data Bus Error
9
10
NVIC_FAULT_STAT_UNALIGN
Unaligned Access Usage Fault
24
25
NVIC_FAULT_STAT_UNDEF
Undefined Instruction Usage Fault
16
17
FPCA
Floating-Point Context Address
0xF38
-1
read-write
n
0x0
0x0
NVIC_FPCA_ADDRESS
Address
3
32
FPCC
Floating-Point Context Control
0xF34
-1
read-write
n
0x0
0x0
NVIC_FPCC_ASPEN
Automatic State Preservation Enable
31
32
NVIC_FPCC_BFRDY
Bus Fault Ready
6
7
NVIC_FPCC_HFRDY
Hard Fault Ready
4
5
NVIC_FPCC_LSPACT
Lazy State Preservation Active
0
1
NVIC_FPCC_LSPEN
Lazy State Preservation Enable
30
31
NVIC_FPCC_MMRDY
Memory Management Fault Ready
5
6
NVIC_FPCC_MONRDY
Monitor Ready
8
9
NVIC_FPCC_THREAD
Thread Mode
3
4
NVIC_FPCC_USER
User Privilege Level
1
2
FPDSC
Floating-Point Default Status Control
0xF3C
-1
read-write
n
0x0
0x0
NVIC_FPDSC_AHP
AHP Bit Default
26
27
NVIC_FPDSC_DN
DN Bit Default
25
26
NVIC_FPDSC_FZ
FZ Bit Default
24
25
NVIC_FPDSC_RMODE
RMODE Bit Default
22
24
NVIC_FPDSC_RMODE_RN
Round to Nearest (RN) mode
0x0
NVIC_FPDSC_RMODE_RP
Round towards Plus Infinity (RP) mode
0x1
NVIC_FPDSC_RMODE_RM
Round towards Minus Infinity (RM) mode
0x2
NVIC_FPDSC_RMODE_RZ
Round towards Zero (RZ) mode
0x3
HFAULT_STAT
Hard Fault Status
0xD2C
-1
read-write
n
0x0
0x0
NVIC_HFAULT_STAT_DBG
Debug Event
31
32
NVIC_HFAULT_STAT_FORCED
Forced Hard Fault
30
31
NVIC_HFAULT_STAT_VECT
Vector Table Read Fault
1
2
INT_CTRL
Interrupt Control and State
0xD04
-1
read-write
n
0x0
0x0
NVIC_INT_CTRL_ISR_PEND
Interrupt Pending
22
23
NVIC_INT_CTRL_ISR_PRE
Debug Interrupt Handling
23
24
NVIC_INT_CTRL_NMI_SET
NMI Set Pending
31
32
NVIC_INT_CTRL_PENDSTCLR
SysTick Clear Pending
25
26
NVIC_INT_CTRL_PENDSTSET
SysTick Set Pending
26
27
NVIC_INT_CTRL_PEND_SV
PendSV Set Pending
28
29
NVIC_INT_CTRL_RET_BASE
Return to Base
11
12
NVIC_INT_CTRL_UNPEND_SV
PendSV Clear Pending
27
28
NVIC_INT_CTRL_VEC_ACT
Interrupt Pending Vector Number
0
8
NVIC_INT_CTRL_VEC_PEN
Interrupt Pending Vector Number
12
20
NVIC_INT_CTRL_VEC_PEN_NMI
NMI
0x2
NVIC_INT_CTRL_VEC_PEN_HARD
Hard fault
0x3
NVIC_INT_CTRL_VEC_PEN_MEM
Memory management fault
0x4
NVIC_INT_CTRL_VEC_PEN_BUS
Bus fault
0x5
NVIC_INT_CTRL_VEC_PEN_USG
Usage fault
0x6
NVIC_INT_CTRL_VEC_PEN_SVC
SVCall
0xb
NVIC_INT_CTRL_VEC_PEN_PNDSV
PendSV
0xe
NVIC_INT_CTRL_VEC_PEN_TICK
SysTick
0xf
INT_TYPE
Interrupt Controller Type Reg
0x4
-1
read-write
n
0x0
0x0
NVIC_INT_TYPE_LINES
Number of interrupt lines (x32)
0
5
MM_ADDR
Memory Management Fault Address
0xD34
-1
read-write
n
0x0
0x0
NVIC_MM_ADDR
Fault Address
0
32
MPU_ATTR
MPU Region Attribute and Size
0xDA0
-1
read-write
n
0x0
0x0
NVIC_MPU_ATTR_AP
Access Privilege
24
27
NVIC_MPU_ATTR_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR_XN
Instruction Access Disable
28
29
MPU_ATTR1
MPU Region Attribute and Size Alias 1
0xDA8
-1
read-write
n
0x0
0x0
NVIC_MPU_ATTR1_AP
Access Privilege
24
27
NVIC_MPU_ATTR1_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR1_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR1_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR1_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR1_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR1_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR1_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR1_XN
Instruction Access Disable
28
29
MPU_ATTR2
MPU Region Attribute and Size Alias 2
0xDB0
-1
read-write
n
0x0
0x0
NVIC_MPU_ATTR2_AP
Access Privilege
24
27
NVIC_MPU_ATTR2_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR2_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR2_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR2_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR2_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR2_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR2_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR2_XN
Instruction Access Disable
28
29
MPU_ATTR3
MPU Region Attribute and Size Alias 3
0xDB8
-1
read-write
n
0x0
0x0
NVIC_MPU_ATTR3_AP
Access Privilege
24
27
NVIC_MPU_ATTR3_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR3_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR3_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR3_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR3_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR3_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR3_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR3_XN
Instruction Access Disable
28
29
MPU_BASE
MPU Region Base Address
0xD9C
-1
read-write
n
0x0
0x0
NVIC_MPU_BASE_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE_REGION
Region Number
0
3
NVIC_MPU_BASE_VALID
Region Number Valid
4
5
MPU_BASE1
MPU Region Base Address Alias 1
0xDA4
-1
read-write
n
0x0
0x0
NVIC_MPU_BASE1_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE1_REGION
Region Number
0
3
NVIC_MPU_BASE1_VALID
Region Number Valid
4
5
MPU_BASE2
MPU Region Base Address Alias 2
0xDAC
-1
read-write
n
0x0
0x0
NVIC_MPU_BASE2_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE2_REGION
Region Number
0
3
NVIC_MPU_BASE2_VALID
Region Number Valid
4
5
MPU_BASE3
MPU Region Base Address Alias 3
0xDB4
-1
read-write
n
0x0
0x0
NVIC_MPU_BASE3_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE3_REGION
Region Number
0
3
NVIC_MPU_BASE3_VALID
Region Number Valid
4
5
MPU_CTRL
MPU Control
0xD94
-1
read-write
n
0x0
0x0
NVIC_MPU_CTRL_ENABLE
MPU Enable
0
1
NVIC_MPU_CTRL_HFNMIENA
MPU Enabled During Faults
1
2
NVIC_MPU_CTRL_PRIVDEFEN
MPU Default Region
2
3
MPU_NUMBER
MPU Region Number
0xD98
-1
read-write
n
0x0
0x0
NVIC_MPU_NUMBER
MPU Region to Access
0
3
MPU_TYPE
MPU Type
0xD90
-1
read-write
n
0x0
0x0
NVIC_MPU_TYPE_DREGION
Number of D Regions
8
16
NVIC_MPU_TYPE_IREGION
Number of I Regions
16
24
NVIC_MPU_TYPE_SEPARATE
Separate or Unified MPU
0
1
NVICACTIVE0
Interrupt 0-31 Active Bit
0x300
read-write
n
0x0
0x0
NVIC_ACTIVE0_INT
Interrupt Active
0
32
NVIC_ACTIVE0_INT0
Interrupt 0 active
0x1
NVIC_ACTIVE0_INT4
Interrupt 4 active
0x10
NVIC_ACTIVE0_INT8
Interrupt 8 active
0x100
NVIC_ACTIVE0_INT12
Interrupt 12 active
0x1000
NVIC_ACTIVE0_INT16
Interrupt 16 active
0x10000
NVIC_ACTIVE0_INT20
Interrupt 20 active
0x100000
NVIC_ACTIVE0_INT24
Interrupt 24 active
0x1000000
NVIC_ACTIVE0_INT28
Interrupt 28 active
0x10000000
NVIC_ACTIVE0_INT1
Interrupt 1 active
0x2
NVIC_ACTIVE0_INT5
Interrupt 5 active
0x20
NVIC_ACTIVE0_INT9
Interrupt 9 active
0x200
NVIC_ACTIVE0_INT13
Interrupt 13 active
0x2000
NVIC_ACTIVE0_INT17
Interrupt 17 active
0x20000
NVIC_ACTIVE0_INT21
Interrupt 21 active
0x200000
NVIC_ACTIVE0_INT25
Interrupt 25 active
0x2000000
NVIC_ACTIVE0_INT29
Interrupt 29 active
0x20000000
NVIC_ACTIVE0_INT2
Interrupt 2 active
0x4
NVIC_ACTIVE0_INT6
Interrupt 6 active
0x40
NVIC_ACTIVE0_INT10
Interrupt 10 active
0x400
NVIC_ACTIVE0_INT14
Interrupt 14 active
0x4000
NVIC_ACTIVE0_INT18
Interrupt 18 active
0x40000
NVIC_ACTIVE0_INT22
Interrupt 22 active
0x400000
NVIC_ACTIVE0_INT26
Interrupt 26 active
0x4000000
NVIC_ACTIVE0_INT30
Interrupt 30 active
0x40000000
NVIC_ACTIVE0_INT3
Interrupt 3 active
0x8
NVIC_ACTIVE0_INT7
Interrupt 7 active
0x80
NVIC_ACTIVE0_INT11
Interrupt 11 active
0x800
NVIC_ACTIVE0_INT15
Interrupt 15 active
0x8000
NVIC_ACTIVE0_INT19
Interrupt 19 active
0x80000
NVIC_ACTIVE0_INT23
Interrupt 23 active
0x800000
NVIC_ACTIVE0_INT27
Interrupt 27 active
0x8000000
NVIC_ACTIVE0_INT31
Interrupt 31 active
0x80000000
NVICACTIVE1
Interrupt 32-54 Active Bit
0x304
read-write
n
0x0
0x0
NVIC_ACTIVE1_INT
Interrupt Active
0
32
NVICACTIVE2
Interrupt 64-95 Active Bit
0x308
read-write
n
0x0
0x0
NVIC_ACTIVE2_INT
Interrupt Active
0
32
NVICACTIVE3
Interrupt 96-127 Active Bit
0x30C
read-write
n
0x0
0x0
NVIC_ACTIVE3_INT
Interrupt Active
0
32
NVICACTIVE4
Interrupt 128-131 Active Bit
0x310
read-write
n
0x0
0x0
NVIC_ACTIVE4_INT
Interrupt Active
0
4
NVICACTLR
Auxiliary Control
0x8
read-write
n
0x0
0x0
NVIC_ACTLR_DISFOLD
Disable IT Folding
2
3
NVIC_ACTLR_DISFPCA
Disable CONTROL
8
9
NVIC_ACTLR_DISMCYC
Disable Interrupts of Multiple Cycle Instructions
0
1
NVIC_ACTLR_DISOOFP
Disable Out-Of-Order Floating Point
9
10
NVIC_ACTLR_DISWBUF
Disable Write Buffer
1
2
NVICAPINT
Application Interrupt and Reset Control
0xD0C
read-write
n
0x0
0x0
NVIC_APINT_ENDIANESS
Data Endianess
15
16
NVIC_APINT_PRIGROUP
Interrupt Priority Grouping
8
11
NVIC_APINT_PRIGROUP_7_1
Priority group 7.1 split
0x0
NVIC_APINT_PRIGROUP_6_2
Priority group 6.2 split
0x1
NVIC_APINT_PRIGROUP_5_3
Priority group 5.3 split
0x2
NVIC_APINT_PRIGROUP_4_4
Priority group 4.4 split
0x3
NVIC_APINT_PRIGROUP_3_5
Priority group 3.5 split
0x4
NVIC_APINT_PRIGROUP_2_6
Priority group 2.6 split
0x5
NVIC_APINT_PRIGROUP_1_7
Priority group 1.7 split
0x6
NVIC_APINT_PRIGROUP_0_8
Priority group 0.8 split
0x7
NVIC_APINT_SYSRESETREQ
System Reset Request
2
3
NVIC_APINT_VECTKEY
Register Key
16
32
NVIC_APINT_VECTKEY
Vector key
0x5fa
NVIC_APINT_VECT_CLR_ACT
Clear Active NMI / Fault
1
2
NVIC_APINT_VECT_RESET
System Reset
0
1
NVICCFG_CTRL
Configuration and Control
0xD14
read-write
n
0x0
0x0
NVIC_CFG_CTRL_BASE_THR
Thread State Control
0
1
NVIC_CFG_CTRL_BFHFNMIGN
Ignore Bus Fault in NMI and Fault
8
9
NVIC_CFG_CTRL_DIV0
Trap on Divide by 0
4
5
NVIC_CFG_CTRL_MAIN_PEND
Allow Main Interrupt Trigger
1
2
NVIC_CFG_CTRL_STKALIGN
Stack Alignment on Exception Entry
9
10
NVIC_CFG_CTRL_UNALIGNED
Trap on Unaligned Access
3
4
NVICCPAC
Coprocessor Access Control
0xD88
read-write
n
0x0
0x0
NVIC_CPAC_CP10
CP10 Coprocessor Access Privilege
20
22
NVIC_CPAC_CP10_DIS
Access Denied
0x0
NVIC_CPAC_CP10_PRIV
Privileged Access Only
0x1
NVIC_CPAC_CP10_FULL
Full Access
0x3
NVIC_CPAC_CP11
CP11 Coprocessor Access Privilege
22
24
NVIC_CPAC_CP11_DIS
Access Denied
0x0
NVIC_CPAC_CP11_PRIV
Privileged Access Only
0x1
NVIC_CPAC_CP11_FULL
Full Access
0x3
NVICCPUID
CPU ID Base
0xD00
read-write
n
0x0
0x0
NVIC_CPUID_CON
Constant
16
20
NVIC_CPUID_IMP
Implementer Code
24
32
NVIC_CPUID_IMP_ARM
ARM
0x41
NVIC_CPUID_PARTNO
Part Number
4
16
NVIC_CPUID_PARTNO_CM4
Cortex-M4 processor
0xc24
NVIC_CPUID_REV
Revision Number
0
4
NVIC_CPUID_VAR
Variant Number
20
24
NVICDBG_CTRL
Debug Control and Status Reg
0xDF0
read-write
n
0x0
0x0
NVIC_DBG_CTRL_C_DEBUGEN
Enable debug
0
1
NVIC_DBG_CTRL_C_HALT
Halt the core
1
2
NVIC_DBG_CTRL_C_MASKINT
Mask interrupts when stepping
3
4
NVIC_DBG_CTRL_C_SNAPSTALL
Breaks a stalled load/store
5
6
NVIC_DBG_CTRL_C_STEP
Step the core
2
3
NVIC_DBG_CTRL_S_HALT
Core status on halt
17
18
NVIC_DBG_CTRL_S_LOCKUP
Core is locked up
19
20
NVIC_DBG_CTRL_S_REGRDY
Register read/write available
16
17
NVIC_DBG_CTRL_S_RESET_ST
Core has reset since last read
25
26
NVIC_DBG_CTRL_S_RETIRE_ST
Core has executed insruction since last read
24
25
NVIC_DBG_CTRL_S_SLEEP
Core is sleeping
18
19
NVICDBG_DATA
Debug Core Register Data
0xDF8
read-write
n
0x0
0x0
NVIC_DBG_DATA
Data temporary cache
0
32
NVICDBG_INT
Debug Reset Interrupt Control
0xDFC
read-write
n
0x0
0x0
NVIC_DBG_INT_BUSERR
Debug trap on bus error
8
9
NVIC_DBG_INT_CHKERR
Debug trap on usage fault check
6
7
NVIC_DBG_INT_HARDERR
Debug trap on hard fault
10
11
NVIC_DBG_INT_INTERR
Debug trap on interrupt errors
9
10
NVIC_DBG_INT_MMERR
Debug trap on mem manage fault
4
5
NVIC_DBG_INT_NOCPERR
Debug trap on coprocessor error
5
6
NVIC_DBG_INT_RESET
Core reset status
3
4
NVIC_DBG_INT_RSTPENDCLR
Clear pending core reset
2
3
NVIC_DBG_INT_RSTPENDING
Core reset is pending
1
2
NVIC_DBG_INT_RSTVCATCH
Reset vector catch
0
1
NVIC_DBG_INT_STATERR
Debug trap on usage fault state
7
8
NVICDBG_XFER
Debug Core Reg. Transfer Select
0xDF4
read-write
n
0x0
0x0
NVIC_DBG_XFER_REG_SEL
Register
0
5
NVIC_DBG_XFER_REG_R0
Register R0
0x0
NVIC_DBG_XFER_REG_R1
Register R1
0x1
NVIC_DBG_XFER_REG_FLAGS
xPSR/Flags register
0x10
NVIC_DBG_XFER_REG_MSP
Main SP
0x11
NVIC_DBG_XFER_REG_PSP
Process SP
0x12
NVIC_DBG_XFER_REG_DSP
Deep SP
0x13
NVIC_DBG_XFER_REG_CFBP
Control/Fault/BasePri/PriMask
0x14
NVIC_DBG_XFER_REG_R2
Register R2
0x2
NVIC_DBG_XFER_REG_R3
Register R3
0x3
NVIC_DBG_XFER_REG_R4
Register R4
0x4
NVIC_DBG_XFER_REG_R5
Register R5
0x5
NVIC_DBG_XFER_REG_R6
Register R6
0x6
NVIC_DBG_XFER_REG_R7
Register R7
0x7
NVIC_DBG_XFER_REG_R8
Register R8
0x8
NVIC_DBG_XFER_REG_R9
Register R9
0x9
NVIC_DBG_XFER_REG_R10
Register R10
0xa
NVIC_DBG_XFER_REG_R11
Register R11
0xb
NVIC_DBG_XFER_REG_R12
Register R12
0xc
NVIC_DBG_XFER_REG_R13
Register R13
0xd
NVIC_DBG_XFER_REG_R14
Register R14
0xe
NVIC_DBG_XFER_REG_R15
Register R15
0xf
NVIC_DBG_XFER_REG_WNR
Write or not read
16
17
NVICDEBUG_STAT
Debug Status Register
0xD30
read-write
n
0x0
0x0
NVIC_DEBUG_STAT_BKPT
Breakpoint instruction
1
2
NVIC_DEBUG_STAT_DWTTRAP
DWT match
2
3
NVIC_DEBUG_STAT_EXTRNL
EDBGRQ asserted
4
5
NVIC_DEBUG_STAT_HALTED
Halt request
0
1
NVIC_DEBUG_STAT_VCATCH
Vector catch
3
4
NVICDIS0
Interrupt 0-31 Clear Enable
0x180
read-write
n
0x0
0x0
NVIC_DIS0_INT
Interrupt Disable
0
32
NVIC_DIS0_INT0
Interrupt 0 disable
0x1
NVIC_DIS0_INT4
Interrupt 4 disable
0x10
NVIC_DIS0_INT8
Interrupt 8 disable
0x100
NVIC_DIS0_INT12
Interrupt 12 disable
0x1000
NVIC_DIS0_INT16
Interrupt 16 disable
0x10000
NVIC_DIS0_INT20
Interrupt 20 disable
0x100000
NVIC_DIS0_INT24
Interrupt 24 disable
0x1000000
NVIC_DIS0_INT28
Interrupt 28 disable
0x10000000
NVIC_DIS0_INT1
Interrupt 1 disable
0x2
NVIC_DIS0_INT5
Interrupt 5 disable
0x20
NVIC_DIS0_INT9
Interrupt 9 disable
0x200
NVIC_DIS0_INT13
Interrupt 13 disable
0x2000
NVIC_DIS0_INT17
Interrupt 17 disable
0x20000
NVIC_DIS0_INT21
Interrupt 21 disable
0x200000
NVIC_DIS0_INT25
Interrupt 25 disable
0x2000000
NVIC_DIS0_INT29
Interrupt 29 disable
0x20000000
NVIC_DIS0_INT2
Interrupt 2 disable
0x4
NVIC_DIS0_INT6
Interrupt 6 disable
0x40
NVIC_DIS0_INT10
Interrupt 10 disable
0x400
NVIC_DIS0_INT14
Interrupt 14 disable
0x4000
NVIC_DIS0_INT18
Interrupt 18 disable
0x40000
NVIC_DIS0_INT22
Interrupt 22 disable
0x400000
NVIC_DIS0_INT26
Interrupt 26 disable
0x4000000
NVIC_DIS0_INT30
Interrupt 30 disable
0x40000000
NVIC_DIS0_INT3
Interrupt 3 disable
0x8
NVIC_DIS0_INT7
Interrupt 7 disable
0x80
NVIC_DIS0_INT11
Interrupt 11 disable
0x800
NVIC_DIS0_INT15
Interrupt 15 disable
0x8000
NVIC_DIS0_INT19
Interrupt 19 disable
0x80000
NVIC_DIS0_INT23
Interrupt 23 disable
0x800000
NVIC_DIS0_INT27
Interrupt 27 disable
0x8000000
NVIC_DIS0_INT31
Interrupt 31 disable
0x80000000
NVICDIS1
Interrupt 32-54 Clear Enable
0x184
read-write
n
0x0
0x0
NVIC_DIS1_INT
Interrupt Disable
0
32
NVICDIS2
Interrupt 64-95 Clear Enable
0x188
read-write
n
0x0
0x0
NVIC_DIS2_INT
Interrupt Disable
0
32
NVICDIS3
Interrupt 96-127 Clear Enable
0x18C
read-write
n
0x0
0x0
NVIC_DIS3_INT
Interrupt Disable
0
32
NVICDIS4
Interrupt 128-131 Clear Enable
0x190
read-write
n
0x0
0x0
NVIC_DIS4_INT
Interrupt Disable
0
4
NVICEN0
Interrupt 0-31 Set Enable
0x100
read-write
n
0x0
0x0
NVIC_EN0_INT
Interrupt Enable
0
32
NVIC_EN0_INT0
Interrupt 0 enable
0x1
NVIC_EN0_INT4
Interrupt 4 enable
0x10
NVIC_EN0_INT8
Interrupt 8 enable
0x100
NVIC_EN0_INT12
Interrupt 12 enable
0x1000
NVIC_EN0_INT16
Interrupt 16 enable
0x10000
NVIC_EN0_INT20
Interrupt 20 enable
0x100000
NVIC_EN0_INT24
Interrupt 24 enable
0x1000000
NVIC_EN0_INT28
Interrupt 28 enable
0x10000000
NVIC_EN0_INT1
Interrupt 1 enable
0x2
NVIC_EN0_INT5
Interrupt 5 enable
0x20
NVIC_EN0_INT9
Interrupt 9 enable
0x200
NVIC_EN0_INT13
Interrupt 13 enable
0x2000
NVIC_EN0_INT17
Interrupt 17 enable
0x20000
NVIC_EN0_INT21
Interrupt 21 enable
0x200000
NVIC_EN0_INT25
Interrupt 25 enable
0x2000000
NVIC_EN0_INT29
Interrupt 29 enable
0x20000000
NVIC_EN0_INT2
Interrupt 2 enable
0x4
NVIC_EN0_INT6
Interrupt 6 enable
0x40
NVIC_EN0_INT10
Interrupt 10 enable
0x400
NVIC_EN0_INT14
Interrupt 14 enable
0x4000
NVIC_EN0_INT18
Interrupt 18 enable
0x40000
NVIC_EN0_INT22
Interrupt 22 enable
0x400000
NVIC_EN0_INT26
Interrupt 26 enable
0x4000000
NVIC_EN0_INT30
Interrupt 30 enable
0x40000000
NVIC_EN0_INT3
Interrupt 3 enable
0x8
NVIC_EN0_INT7
Interrupt 7 enable
0x80
NVIC_EN0_INT11
Interrupt 11 enable
0x800
NVIC_EN0_INT15
Interrupt 15 enable
0x8000
NVIC_EN0_INT19
Interrupt 19 enable
0x80000
NVIC_EN0_INT23
Interrupt 23 enable
0x800000
NVIC_EN0_INT27
Interrupt 27 enable
0x8000000
NVIC_EN0_INT31
Interrupt 31 enable
0x80000000
NVICEN1
Interrupt 32-54 Set Enable
0x104
read-write
n
0x0
0x0
NVIC_EN1_INT
Interrupt Enable
0
32
NVICEN2
Interrupt 64-95 Set Enable
0x108
read-write
n
0x0
0x0
NVIC_EN2_INT
Interrupt Enable
0
32
NVICEN3
Interrupt 96-127 Set Enable
0x10C
read-write
n
0x0
0x0
NVIC_EN3_INT
Interrupt Enable
0
32
NVICEN4
Interrupt 128-131 Set Enable
0x110
read-write
n
0x0
0x0
NVIC_EN4_INT
Interrupt Enable
0
4
NVICFAULT_ADDR
Bus Fault Address
0xD38
read-write
n
0x0
0x0
NVIC_FAULT_ADDR
Fault Address
0
32
NVICFAULT_STAT
Configurable Fault Status
0xD28
read-write
n
0x0
0x0
NVIC_FAULT_STAT_BFARV
Bus Fault Address Register Valid
15
16
NVIC_FAULT_STAT_BLSPERR
Bus Fault on Floating-Point Lazy State Preservation
13
14
NVIC_FAULT_STAT_BSTKE
Stack Bus Fault
12
13
NVIC_FAULT_STAT_BUSTKE
Unstack Bus Fault
11
12
NVIC_FAULT_STAT_DERR
Data Access Violation
1
2
NVIC_FAULT_STAT_DIV0
Divide-by-Zero Usage Fault
25
26
NVIC_FAULT_STAT_IBUS
Instruction Bus Error
8
9
NVIC_FAULT_STAT_IERR
Instruction Access Violation
0
1
NVIC_FAULT_STAT_IMPRE
Imprecise Data Bus Error
10
11
NVIC_FAULT_STAT_INVPC
Invalid PC Load Usage Fault
18
19
NVIC_FAULT_STAT_INVSTAT
Invalid State Usage Fault
17
18
NVIC_FAULT_STAT_MLSPERR
Memory Management Fault on Floating-Point Lazy State Preservation
5
6
NVIC_FAULT_STAT_MMARV
Memory Management Fault Address Register Valid
7
8
NVIC_FAULT_STAT_MSTKE
Stack Access Violation
4
5
NVIC_FAULT_STAT_MUSTKE
Unstack Access Violation
3
4
NVIC_FAULT_STAT_NOCP
No Coprocessor Usage Fault
19
20
NVIC_FAULT_STAT_PRECISE
Precise Data Bus Error
9
10
NVIC_FAULT_STAT_UNALIGN
Unaligned Access Usage Fault
24
25
NVIC_FAULT_STAT_UNDEF
Undefined Instruction Usage Fault
16
17
NVICFPCA
Floating-Point Context Address
0xF38
read-write
n
0x0
0x0
NVIC_FPCA_ADDRESS
Address
3
32
NVICFPCC
Floating-Point Context Control
0xF34
read-write
n
0x0
0x0
NVIC_FPCC_ASPEN
Automatic State Preservation Enable
31
32
NVIC_FPCC_BFRDY
Bus Fault Ready
6
7
NVIC_FPCC_HFRDY
Hard Fault Ready
4
5
NVIC_FPCC_LSPACT
Lazy State Preservation Active
0
1
NVIC_FPCC_LSPEN
Lazy State Preservation Enable
30
31
NVIC_FPCC_MMRDY
Memory Management Fault Ready
5
6
NVIC_FPCC_MONRDY
Monitor Ready
8
9
NVIC_FPCC_THREAD
Thread Mode
3
4
NVIC_FPCC_USER
User Privilege Level
1
2
NVICFPDSC
Floating-Point Default Status Control
0xF3C
read-write
n
0x0
0x0
NVIC_FPDSC_AHP
AHP Bit Default
26
27
NVIC_FPDSC_DN
DN Bit Default
25
26
NVIC_FPDSC_FZ
FZ Bit Default
24
25
NVIC_FPDSC_RMODE
RMODE Bit Default
22
24
NVIC_FPDSC_RMODE_RN
Round to Nearest (RN) mode
0x0
NVIC_FPDSC_RMODE_RP
Round towards Plus Infinity (RP) mode
0x1
NVIC_FPDSC_RMODE_RM
Round towards Minus Infinity (RM) mode
0x2
NVIC_FPDSC_RMODE_RZ
Round towards Zero (RZ) mode
0x3
NVICHFAULT_STAT
Hard Fault Status
0xD2C
read-write
n
0x0
0x0
NVIC_HFAULT_STAT_DBG
Debug Event
31
32
NVIC_HFAULT_STAT_FORCED
Forced Hard Fault
30
31
NVIC_HFAULT_STAT_VECT
Vector Table Read Fault
1
2
NVICINT_CTRL
Interrupt Control and State
0xD04
read-write
n
0x0
0x0
NVIC_INT_CTRL_ISR_PEND
Interrupt Pending
22
23
NVIC_INT_CTRL_ISR_PRE
Debug Interrupt Handling
23
24
NVIC_INT_CTRL_NMI_SET
NMI Set Pending
31
32
NVIC_INT_CTRL_PENDSTCLR
SysTick Clear Pending
25
26
NVIC_INT_CTRL_PENDSTSET
SysTick Set Pending
26
27
NVIC_INT_CTRL_PEND_SV
PendSV Set Pending
28
29
NVIC_INT_CTRL_RET_BASE
Return to Base
11
12
NVIC_INT_CTRL_UNPEND_SV
PendSV Clear Pending
27
28
NVIC_INT_CTRL_VEC_ACT
Interrupt Pending Vector Number
0
8
NVIC_INT_CTRL_VEC_PEN
Interrupt Pending Vector Number
12
20
NVIC_INT_CTRL_VEC_PEN_NMI
NMI
0x2
NVIC_INT_CTRL_VEC_PEN_HARD
Hard fault
0x3
NVIC_INT_CTRL_VEC_PEN_MEM
Memory management fault
0x4
NVIC_INT_CTRL_VEC_PEN_BUS
Bus fault
0x5
NVIC_INT_CTRL_VEC_PEN_USG
Usage fault
0x6
NVIC_INT_CTRL_VEC_PEN_SVC
SVCall
0xb
NVIC_INT_CTRL_VEC_PEN_PNDSV
PendSV
0xe
NVIC_INT_CTRL_VEC_PEN_TICK
SysTick
0xf
NVICINT_TYPE
Interrupt Controller Type Reg
0x4
read-write
n
0x0
0x0
NVIC_INT_TYPE_LINES
Number of interrupt lines (x32)
0
5
NVICMM_ADDR
Memory Management Fault Address
0xD34
read-write
n
0x0
0x0
NVIC_MM_ADDR
Fault Address
0
32
NVICMPU_ATTR
MPU Region Attribute and Size
0xDA0
read-write
n
0x0
0x0
NVIC_MPU_ATTR_AP
Access Privilege
24
27
NVIC_MPU_ATTR_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR_XN
Instruction Access Disable
28
29
NVICMPU_ATTR1
MPU Region Attribute and Size Alias 1
0xDA8
read-write
n
0x0
0x0
NVIC_MPU_ATTR1_AP
Access Privilege
24
27
NVIC_MPU_ATTR1_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR1_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR1_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR1_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR1_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR1_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR1_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR1_XN
Instruction Access Disable
28
29
NVICMPU_ATTR2
MPU Region Attribute and Size Alias 2
0xDB0
read-write
n
0x0
0x0
NVIC_MPU_ATTR2_AP
Access Privilege
24
27
NVIC_MPU_ATTR2_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR2_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR2_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR2_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR2_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR2_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR2_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR2_XN
Instruction Access Disable
28
29
NVICMPU_ATTR3
MPU Region Attribute and Size Alias 3
0xDB8
read-write
n
0x0
0x0
NVIC_MPU_ATTR3_AP
Access Privilege
24
27
NVIC_MPU_ATTR3_BUFFRABLE
Bufferable
16
17
NVIC_MPU_ATTR3_CACHEABLE
Cacheable
17
18
NVIC_MPU_ATTR3_ENABLE
Region Enable
0
1
NVIC_MPU_ATTR3_SHAREABLE
Shareable
18
19
NVIC_MPU_ATTR3_SIZE
Region Size Mask
1
6
NVIC_MPU_ATTR3_SRD
Subregion Disable Bits
8
16
NVIC_MPU_ATTR3_TEX
Type Extension Mask
19
22
NVIC_MPU_ATTR3_XN
Instruction Access Disable
28
29
NVICMPU_BASE
MPU Region Base Address
0xD9C
read-write
n
0x0
0x0
NVIC_MPU_BASE_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE_REGION
Region Number
0
3
NVIC_MPU_BASE_VALID
Region Number Valid
4
5
NVICMPU_BASE1
MPU Region Base Address Alias 1
0xDA4
read-write
n
0x0
0x0
NVIC_MPU_BASE1_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE1_REGION
Region Number
0
3
NVIC_MPU_BASE1_VALID
Region Number Valid
4
5
NVICMPU_BASE2
MPU Region Base Address Alias 2
0xDAC
read-write
n
0x0
0x0
NVIC_MPU_BASE2_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE2_REGION
Region Number
0
3
NVIC_MPU_BASE2_VALID
Region Number Valid
4
5
NVICMPU_BASE3
MPU Region Base Address Alias 3
0xDB4
read-write
n
0x0
0x0
NVIC_MPU_BASE3_ADDR
Base Address Mask
5
32
NVIC_MPU_BASE3_REGION
Region Number
0
3
NVIC_MPU_BASE3_VALID
Region Number Valid
4
5
NVICMPU_CTRL
MPU Control
0xD94
read-write
n
0x0
0x0
NVIC_MPU_CTRL_ENABLE
MPU Enable
0
1
NVIC_MPU_CTRL_HFNMIENA
MPU Enabled During Faults
1
2
NVIC_MPU_CTRL_PRIVDEFEN
MPU Default Region
2
3
NVICMPU_NUMBER
MPU Region Number
0xD98
read-write
n
0x0
0x0
NVIC_MPU_NUMBER
MPU Region to Access
0
3
NVICMPU_TYPE
MPU Type
0xD90
read-write
n
0x0
0x0
NVIC_MPU_TYPE_DREGION
Number of D Regions
8
16
NVIC_MPU_TYPE_IREGION
Number of I Regions
16
24
NVIC_MPU_TYPE_SEPARATE
Separate or Unified MPU
0
1
NVICPEND0
Interrupt 0-31 Set Pending
0x200
read-write
n
0x0
0x0
NVIC_PEND0_INT
Interrupt Set Pending
0
32
NVIC_PEND0_INT0
Interrupt 0 pend
0x1
NVIC_PEND0_INT4
Interrupt 4 pend
0x10
NVIC_PEND0_INT8
Interrupt 8 pend
0x100
NVIC_PEND0_INT12
Interrupt 12 pend
0x1000
NVIC_PEND0_INT16
Interrupt 16 pend
0x10000
NVIC_PEND0_INT20
Interrupt 20 pend
0x100000
NVIC_PEND0_INT24
Interrupt 24 pend
0x1000000
NVIC_PEND0_INT28
Interrupt 28 pend
0x10000000
NVIC_PEND0_INT1
Interrupt 1 pend
0x2
NVIC_PEND0_INT5
Interrupt 5 pend
0x20
NVIC_PEND0_INT9
Interrupt 9 pend
0x200
NVIC_PEND0_INT13
Interrupt 13 pend
0x2000
NVIC_PEND0_INT17
Interrupt 17 pend
0x20000
NVIC_PEND0_INT21
Interrupt 21 pend
0x200000
NVIC_PEND0_INT25
Interrupt 25 pend
0x2000000
NVIC_PEND0_INT29
Interrupt 29 pend
0x20000000
NVIC_PEND0_INT2
Interrupt 2 pend
0x4
NVIC_PEND0_INT6
Interrupt 6 pend
0x40
NVIC_PEND0_INT10
Interrupt 10 pend
0x400
NVIC_PEND0_INT14
Interrupt 14 pend
0x4000
NVIC_PEND0_INT18
Interrupt 18 pend
0x40000
NVIC_PEND0_INT22
Interrupt 22 pend
0x400000
NVIC_PEND0_INT26
Interrupt 26 pend
0x4000000
NVIC_PEND0_INT30
Interrupt 30 pend
0x40000000
NVIC_PEND0_INT3
Interrupt 3 pend
0x8
NVIC_PEND0_INT7
Interrupt 7 pend
0x80
NVIC_PEND0_INT11
Interrupt 11 pend
0x800
NVIC_PEND0_INT15
Interrupt 15 pend
0x8000
NVIC_PEND0_INT19
Interrupt 19 pend
0x80000
NVIC_PEND0_INT23
Interrupt 23 pend
0x800000
NVIC_PEND0_INT27
Interrupt 27 pend
0x8000000
NVIC_PEND0_INT31
Interrupt 31 pend
0x80000000
NVICPEND1
Interrupt 32-54 Set Pending
0x204
read-write
n
0x0
0x0
NVIC_PEND1_INT
Interrupt Set Pending
0
32
NVICPEND2
Interrupt 64-95 Set Pending
0x208
read-write
n
0x0
0x0
NVIC_PEND2_INT
Interrupt Set Pending
0
32
NVICPEND3
Interrupt 96-127 Set Pending
0x20C
read-write
n
0x0
0x0
NVIC_PEND3_INT
Interrupt Set Pending
0
32
NVICPEND4
Interrupt 128-131 Set Pending
0x210
read-write
n
0x0
0x0
NVIC_PEND4_INT
Interrupt Set Pending
0
4
NVICPRI0
Interrupt 0-3 Priority
0x400
read-write
n
0x0
0x0
NVIC_PRI0_INT0
Interrupt 0 Priority Mask
5
8
NVIC_PRI0_INT1
Interrupt 1 Priority Mask
13
16
NVIC_PRI0_INT2
Interrupt 2 Priority Mask
21
24
NVIC_PRI0_INT3
Interrupt 3 Priority Mask
29
32
NVICPRI1
Interrupt 4-7 Priority
0x404
read-write
n
0x0
0x0
NVIC_PRI1_INT4
Interrupt 4 Priority Mask
5
8
NVIC_PRI1_INT5
Interrupt 5 Priority Mask
13
16
NVIC_PRI1_INT6
Interrupt 6 Priority Mask
21
24
NVIC_PRI1_INT7
Interrupt 7 Priority Mask
29
32
NVICPRI10
Interrupt 40-43 Priority
0x428
read-write
n
0x0
0x0
NVIC_PRI10_INT40
Interrupt 40 Priority Mask
5
8
NVIC_PRI10_INT41
Interrupt 41 Priority Mask
13
16
NVIC_PRI10_INT42
Interrupt 42 Priority Mask
21
24
NVIC_PRI10_INT43
Interrupt 43 Priority Mask
29
32
NVICPRI11
Interrupt 44-47 Priority
0x42C
read-write
n
0x0
0x0
NVIC_PRI11_INT44
Interrupt 44 Priority Mask
5
8
NVIC_PRI11_INT45
Interrupt 45 Priority Mask
13
16
NVIC_PRI11_INT46
Interrupt 46 Priority Mask
21
24
NVIC_PRI11_INT47
Interrupt 47 Priority Mask
29
32
NVICPRI12
Interrupt 48-51 Priority
0x430
read-write
n
0x0
0x0
NVIC_PRI12_INT48
Interrupt 48 Priority Mask
5
8
NVIC_PRI12_INT49
Interrupt 49 Priority Mask
13
16
NVIC_PRI12_INT50
Interrupt 50 Priority Mask
21
24
NVIC_PRI12_INT51
Interrupt 51 Priority Mask
29
32
NVICPRI13
Interrupt 52-53 Priority
0x434
read-write
n
0x0
0x0
NVIC_PRI13_INT52
Interrupt 52 Priority Mask
5
8
NVIC_PRI13_INT53
Interrupt 53 Priority Mask
13
16
NVIC_PRI13_INT54
Interrupt 54 Priority Mask
21
24
NVIC_PRI13_INT55
Interrupt 55 Priority Mask
29
32
NVICPRI14
Interrupt 56-59 Priority
0x438
read-write
n
0x0
0x0
NVIC_PRI14_INTA
Interrupt 56 Priority Mask
5
8
NVIC_PRI14_INTB
Interrupt 57 Priority Mask
13
16
NVIC_PRI14_INTC
Interrupt 58 Priority Mask
21
24
NVIC_PRI14_INTD
Interrupt 59 Priority Mask
29
32
NVICPRI15
Interrupt 60-63 Priority
0x43C
read-write
n
0x0
0x0
NVIC_PRI15_INTA
Interrupt 60 Priority Mask
5
8
NVIC_PRI15_INTB
Interrupt 61 Priority Mask
13
16
NVIC_PRI15_INTC
Interrupt 62 Priority Mask
21
24
NVIC_PRI15_INTD
Interrupt 63 Priority Mask
29
32
NVICPRI16
Interrupt 64-67 Priority
0x440
read-write
n
0x0
0x0
NVIC_PRI16_INTA
Interrupt 64 Priority Mask
5
8
NVIC_PRI16_INTB
Interrupt 65 Priority Mask
13
16
NVIC_PRI16_INTC
Interrupt 66 Priority Mask
21
24
NVIC_PRI16_INTD
Interrupt 67 Priority Mask
29
32
NVICPRI17
Interrupt 68-71 Priority
0x444
read-write
n
0x0
0x0
NVIC_PRI17_INTA
Interrupt 68 Priority Mask
5
8
NVIC_PRI17_INTB
Interrupt 69 Priority Mask
13
16
NVIC_PRI17_INTC
Interrupt 70 Priority Mask
21
24
NVIC_PRI17_INTD
Interrupt 71 Priority Mask
29
32
NVICPRI18
Interrupt 72-75 Priority
0x448
read-write
n
0x0
0x0
NVIC_PRI18_INTA
Interrupt 72 Priority Mask
5
8
NVIC_PRI18_INTB
Interrupt 73 Priority Mask
13
16
NVIC_PRI18_INTC
Interrupt 74 Priority Mask
21
24
NVIC_PRI18_INTD
Interrupt 75 Priority Mask
29
32
NVICPRI19
Interrupt 76-79 Priority
0x44C
read-write
n
0x0
0x0
NVIC_PRI19_INTA
Interrupt 76 Priority Mask
5
8
NVIC_PRI19_INTB
Interrupt 77 Priority Mask
13
16
NVIC_PRI19_INTC
Interrupt 78 Priority Mask
21
24
NVIC_PRI19_INTD
Interrupt 79 Priority Mask
29
32
NVICPRI2
Interrupt 8-11 Priority
0x408
read-write
n
0x0
0x0
NVIC_PRI2_INT10
Interrupt 10 Priority Mask
21
24
NVIC_PRI2_INT11
Interrupt 11 Priority Mask
29
32
NVIC_PRI2_INT8
Interrupt 8 Priority Mask
5
8
NVIC_PRI2_INT9
Interrupt 9 Priority Mask
13
16
NVICPRI20
Interrupt 80-83 Priority
0x450
read-write
n
0x0
0x0
NVIC_PRI20_INTA
Interrupt 80 Priority Mask
5
8
NVIC_PRI20_INTB
Interrupt 81 Priority Mask
13
16
NVIC_PRI20_INTC
Interrupt 82 Priority Mask
21
24
NVIC_PRI20_INTD
Interrupt 83 Priority Mask
29
32
NVICPRI21
Interrupt 84-87 Priority
0x454
read-write
n
0x0
0x0
NVIC_PRI21_INTA
Interrupt 84 Priority Mask
5
8
NVIC_PRI21_INTB
Interrupt 85 Priority Mask
13
16
NVIC_PRI21_INTC
Interrupt 86 Priority Mask
21
24
NVIC_PRI21_INTD
Interrupt 87 Priority Mask
29
32
NVICPRI22
Interrupt 88-91 Priority
0x458
read-write
n
0x0
0x0
NVIC_PRI22_INTA
Interrupt 88 Priority Mask
5
8
NVIC_PRI22_INTB
Interrupt 89 Priority Mask
13
16
NVIC_PRI22_INTC
Interrupt 90 Priority Mask
21
24
NVIC_PRI22_INTD
Interrupt 91 Priority Mask
29
32
NVICPRI23
Interrupt 92-95 Priority
0x45C
read-write
n
0x0
0x0
NVIC_PRI23_INTA
Interrupt 92 Priority Mask
5
8
NVIC_PRI23_INTB
Interrupt 93 Priority Mask
13
16
NVIC_PRI23_INTC
Interrupt 94 Priority Mask
21
24
NVIC_PRI23_INTD
Interrupt 95 Priority Mask
29
32
NVICPRI24
Interrupt 96-99 Priority
0x460
read-write
n
0x0
0x0
NVIC_PRI24_INTA
Interrupt 96 Priority Mask
5
8
NVIC_PRI24_INTB
Interrupt 97 Priority Mask
13
16
NVIC_PRI24_INTC
Interrupt 98 Priority Mask
21
24
NVIC_PRI24_INTD
Interrupt 99 Priority Mask
29
32
NVICPRI25
Interrupt 100-103 Priority
0x464
read-write
n
0x0
0x0
NVIC_PRI25_INTA
Interrupt 100 Priority Mask
5
8
NVIC_PRI25_INTB
Interrupt 101 Priority Mask
13
16
NVIC_PRI25_INTC
Interrupt 102 Priority Mask
21
24
NVIC_PRI25_INTD
Interrupt 103 Priority Mask
29
32
NVICPRI26
Interrupt 104-107 Priority
0x468
read-write
n
0x0
0x0
NVIC_PRI26_INTA
Interrupt 104 Priority Mask
5
8
NVIC_PRI26_INTB
Interrupt 105 Priority Mask
13
16
NVIC_PRI26_INTC
Interrupt 106 Priority Mask
21
24
NVIC_PRI26_INTD
Interrupt 107 Priority Mask
29
32
NVICPRI27
Interrupt 108-111 Priority
0x46C
read-write
n
0x0
0x0
NVIC_PRI27_INTA
Interrupt 108 Priority Mask
5
8
NVIC_PRI27_INTB
Interrupt 109 Priority Mask
13
16
NVIC_PRI27_INTC
Interrupt 110 Priority Mask
21
24
NVIC_PRI27_INTD
Interrupt 111 Priority Mask
29
32
NVICPRI28
Interrupt 112-115 Priority
0x470
read-write
n
0x0
0x0
NVIC_PRI28_INTA
Interrupt 112 Priority Mask
5
8
NVIC_PRI28_INTB
Interrupt 113 Priority Mask
13
16
NVIC_PRI28_INTC
Interrupt 114 Priority Mask
21
24
NVIC_PRI28_INTD
Interrupt 115 Priority Mask
29
32
NVICPRI29
Interrupt 116-119 Priority
0x474
read-write
n
0x0
0x0
NVIC_PRI29_INTA
Interrupt 116 Priority Mask
5
8
NVIC_PRI29_INTB
Interrupt 117 Priority Mask
13
16
NVIC_PRI29_INTC
Interrupt 118 Priority Mask
21
24
NVIC_PRI29_INTD
Interrupt 119 Priority Mask
29
32
NVICPRI3
Interrupt 12-15 Priority
0x40C
read-write
n
0x0
0x0
NVIC_PRI3_INT12
Interrupt 12 Priority Mask
5
8
NVIC_PRI3_INT13
Interrupt 13 Priority Mask
13
16
NVIC_PRI3_INT14
Interrupt 14 Priority Mask
21
24
NVIC_PRI3_INT15
Interrupt 15 Priority Mask
29
32
NVICPRI30
Interrupt 120-123 Priority
0x478
read-write
n
0x0
0x0
NVIC_PRI30_INTA
Interrupt 120 Priority Mask
5
8
NVIC_PRI30_INTB
Interrupt 121 Priority Mask
13
16
NVIC_PRI30_INTC
Interrupt 122 Priority Mask
21
24
NVIC_PRI30_INTD
Interrupt 123 Priority Mask
29
32
NVICPRI31
Interrupt 124-127 Priority
0x47C
read-write
n
0x0
0x0
NVIC_PRI31_INTA
Interrupt 124 Priority Mask
5
8
NVIC_PRI31_INTB
Interrupt 125 Priority Mask
13
16
NVIC_PRI31_INTC
Interrupt 126 Priority Mask
21
24
NVIC_PRI31_INTD
Interrupt 127 Priority Mask
29
32
NVICPRI32
Interrupt 128-131 Priority
0x480
read-write
n
0x0
0x0
NVIC_PRI32_INTA
Interrupt 128 Priority Mask
5
8
NVIC_PRI32_INTB
Interrupt 129 Priority Mask
13
16
NVIC_PRI32_INTC
Interrupt 130 Priority Mask
21
24
NVIC_PRI32_INTD
Interrupt 131 Priority Mask
29
32
NVICPRI4
Interrupt 16-19 Priority
0x410
read-write
n
0x0
0x0
NVIC_PRI4_INT16
Interrupt 16 Priority Mask
5
8
NVIC_PRI4_INT17
Interrupt 17 Priority Mask
13
16
NVIC_PRI4_INT18
Interrupt 18 Priority Mask
21
24
NVIC_PRI4_INT19
Interrupt 19 Priority Mask
29
32
NVICPRI5
Interrupt 20-23 Priority
0x414
read-write
n
0x0
0x0
NVIC_PRI5_INT20
Interrupt 20 Priority Mask
5
8
NVIC_PRI5_INT21
Interrupt 21 Priority Mask
13
16
NVIC_PRI5_INT22
Interrupt 22 Priority Mask
21
24
NVIC_PRI5_INT23
Interrupt 23 Priority Mask
29
32
NVICPRI6
Interrupt 24-27 Priority
0x418
read-write
n
0x0
0x0
NVIC_PRI6_INT24
Interrupt 24 Priority Mask
5
8
NVIC_PRI6_INT25
Interrupt 25 Priority Mask
13
16
NVIC_PRI6_INT26
Interrupt 26 Priority Mask
21
24
NVIC_PRI6_INT27
Interrupt 27 Priority Mask
29
32
NVICPRI7
Interrupt 28-31 Priority
0x41C
read-write
n
0x0
0x0
NVIC_PRI7_INT28
Interrupt 28 Priority Mask
5
8
NVIC_PRI7_INT29
Interrupt 29 Priority Mask
13
16
NVIC_PRI7_INT30
Interrupt 30 Priority Mask
21
24
NVIC_PRI7_INT31
Interrupt 31 Priority Mask
29
32
NVICPRI8
Interrupt 32-35 Priority
0x420
read-write
n
0x0
0x0
NVIC_PRI8_INT32
Interrupt 32 Priority Mask
5
8
NVIC_PRI8_INT33
Interrupt 33 Priority Mask
13
16
NVIC_PRI8_INT34
Interrupt 34 Priority Mask
21
24
NVIC_PRI8_INT35
Interrupt 35 Priority Mask
29
32
NVICPRI9
Interrupt 36-39 Priority
0x424
read-write
n
0x0
0x0
NVIC_PRI9_INT36
Interrupt 36 Priority Mask
5
8
NVIC_PRI9_INT37
Interrupt 37 Priority Mask
13
16
NVIC_PRI9_INT38
Interrupt 38 Priority Mask
21
24
NVIC_PRI9_INT39
Interrupt 39 Priority Mask
29
32
NVICST_CAL
SysTick Calibration Value Reg
0x1C
read-write
n
0x0
0x0
NVIC_ST_CAL_NOREF
No reference clock
31
32
NVIC_ST_CAL_ONEMS
1ms reference value
0
24
NVIC_ST_CAL_SKEW
Clock skew
30
31
NVICST_CTRL
SysTick Control and Status Register
0x10
read-write
n
0x0
0x0
NVIC_ST_CTRL_CLK_SRC
Clock Source
2
3
NVIC_ST_CTRL_COUNT
Count Flag
16
17
NVIC_ST_CTRL_ENABLE
Enable
0
1
NVIC_ST_CTRL_INTEN
Interrupt Enable
1
2
NVICST_CURRENT
SysTick Current Value Register
0x18
read-write
n
0x0
0x0
NVIC_ST_CURRENT
Current Value
0
24
NVICST_RELOAD
SysTick Reload Value Register
0x14
read-write
n
0x0
0x0
NVIC_ST_RELOAD
Reload Value
0
24
NVICSW_TRIG
Software Trigger Interrupt
0xF00
write-only
n
0x0
0x0
NVIC_SW_TRIG_INTID
Interrupt ID
0
8
write-only
NVICSYS_CTRL
System Control
0xD10
read-write
n
0x0
0x0
NVIC_SYS_CTRL_SEVONPEND
Wake Up on Pending
4
5
NVIC_SYS_CTRL_SLEEPDEEP
Deep Sleep Enable
2
3
NVIC_SYS_CTRL_SLEEPEXIT
Sleep on ISR Exit
1
2
NVICSYS_HND_CTRL
System Handler Control and State
0xD24
read-write
n
0x0
0x0
NVIC_SYS_HND_CTRL_BUS
Bus Fault Enable
17
18
NVIC_SYS_HND_CTRL_BUSA
Bus Fault Active
1
2
NVIC_SYS_HND_CTRL_BUSP
Bus Fault Pending
14
15
NVIC_SYS_HND_CTRL_MEM
Memory Management Fault Enable
16
17
NVIC_SYS_HND_CTRL_MEMA
Memory Management Fault Active
0
1
NVIC_SYS_HND_CTRL_MEMP
Memory Management Fault Pending
13
14
NVIC_SYS_HND_CTRL_MON
Debug Monitor Active
8
9
NVIC_SYS_HND_CTRL_PNDSV
PendSV Exception Active
10
11
NVIC_SYS_HND_CTRL_SVC
SVC Call Pending
15
16
NVIC_SYS_HND_CTRL_SVCA
SVC Call Active
7
8
NVIC_SYS_HND_CTRL_TICK
SysTick Exception Active
11
12
NVIC_SYS_HND_CTRL_USAGE
Usage Fault Enable
18
19
NVIC_SYS_HND_CTRL_USAGEP
Usage Fault Pending
12
13
NVIC_SYS_HND_CTRL_USGA
Usage Fault Active
3
4
NVICSYS_PRI1
System Handler Priority 1
0xD18
read-write
n
0x0
0x0
NVIC_SYS_PRI1_BUS
Bus Fault Priority
13
16
NVIC_SYS_PRI1_MEM
Memory Management Fault Priority
5
8
NVIC_SYS_PRI1_USAGE
Usage Fault Priority
21
24
NVICSYS_PRI2
System Handler Priority 2
0xD1C
read-write
n
0x0
0x0
NVIC_SYS_PRI2_SVC
SVCall Priority
29
32
NVICSYS_PRI3
System Handler Priority 3
0xD20
read-write
n
0x0
0x0
NVIC_SYS_PRI3_DEBUG
Debug Priority
5
8
NVIC_SYS_PRI3_PENDSV
PendSV Priority
21
24
NVIC_SYS_PRI3_TICK
SysTick Exception Priority
29
32
NVICUNPEND0
Interrupt 0-31 Clear Pending
0x280
read-write
n
0x0
0x0
NVIC_UNPEND0_INT
Interrupt Clear Pending
0
32
NVIC_UNPEND0_INT0
Interrupt 0 unpend
0x1
NVIC_UNPEND0_INT4
Interrupt 4 unpend
0x10
NVIC_UNPEND0_INT8
Interrupt 8 unpend
0x100
NVIC_UNPEND0_INT12
Interrupt 12 unpend
0x1000
NVIC_UNPEND0_INT16
Interrupt 16 unpend
0x10000
NVIC_UNPEND0_INT20
Interrupt 20 unpend
0x100000
NVIC_UNPEND0_INT24
Interrupt 24 unpend
0x1000000
NVIC_UNPEND0_INT28
Interrupt 28 unpend
0x10000000
NVIC_UNPEND0_INT1
Interrupt 1 unpend
0x2
NVIC_UNPEND0_INT5
Interrupt 5 unpend
0x20
NVIC_UNPEND0_INT9
Interrupt 9 unpend
0x200
NVIC_UNPEND0_INT13
Interrupt 13 unpend
0x2000
NVIC_UNPEND0_INT17
Interrupt 17 unpend
0x20000
NVIC_UNPEND0_INT21
Interrupt 21 unpend
0x200000
NVIC_UNPEND0_INT25
Interrupt 25 unpend
0x2000000
NVIC_UNPEND0_INT29
Interrupt 29 unpend
0x20000000
NVIC_UNPEND0_INT2
Interrupt 2 unpend
0x4
NVIC_UNPEND0_INT6
Interrupt 6 unpend
0x40
NVIC_UNPEND0_INT10
Interrupt 10 unpend
0x400
NVIC_UNPEND0_INT14
Interrupt 14 unpend
0x4000
NVIC_UNPEND0_INT18
Interrupt 18 unpend
0x40000
NVIC_UNPEND0_INT22
Interrupt 22 unpend
0x400000
NVIC_UNPEND0_INT26
Interrupt 26 unpend
0x4000000
NVIC_UNPEND0_INT30
Interrupt 30 unpend
0x40000000
NVIC_UNPEND0_INT3
Interrupt 3 unpend
0x8
NVIC_UNPEND0_INT7
Interrupt 7 unpend
0x80
NVIC_UNPEND0_INT11
Interrupt 11 unpend
0x800
NVIC_UNPEND0_INT15
Interrupt 15 unpend
0x8000
NVIC_UNPEND0_INT19
Interrupt 19 unpend
0x80000
NVIC_UNPEND0_INT23
Interrupt 23 unpend
0x800000
NVIC_UNPEND0_INT27
Interrupt 27 unpend
0x8000000
NVIC_UNPEND0_INT31
Interrupt 31 unpend
0x80000000
NVICUNPEND1
Interrupt 32-54 Clear Pending
0x284
read-write
n
0x0
0x0
NVIC_UNPEND1_INT
Interrupt Clear Pending
0
32
NVIC_UNPEND1_INT32
Interrupt 32 unpend
0x1
NVIC_UNPEND1_INT36
Interrupt 36 unpend
0x10
NVIC_UNPEND1_INT40
Interrupt 40 unpend
0x100
NVIC_UNPEND1_INT44
Interrupt 44 unpend
0x1000
NVIC_UNPEND1_INT48
Interrupt 48 unpend
0x10000
NVIC_UNPEND1_INT52
Interrupt 52 unpend
0x100000
NVIC_UNPEND1_INT33
Interrupt 33 unpend
0x2
NVIC_UNPEND1_INT37
Interrupt 37 unpend
0x20
NVIC_UNPEND1_INT41
Interrupt 41 unpend
0x200
NVIC_UNPEND1_INT45
Interrupt 45 unpend
0x2000
NVIC_UNPEND1_INT49
Interrupt 49 unpend
0x20000
NVIC_UNPEND1_INT53
Interrupt 53 unpend
0x200000
NVIC_UNPEND1_INT34
Interrupt 34 unpend
0x4
NVIC_UNPEND1_INT38
Interrupt 38 unpend
0x40
NVIC_UNPEND1_INT42
Interrupt 42 unpend
0x400
NVIC_UNPEND1_INT46
Interrupt 46 unpend
0x4000
NVIC_UNPEND1_INT50
Interrupt 50 unpend
0x40000
NVIC_UNPEND1_INT54
Interrupt 54 unpend
0x400000
NVIC_UNPEND1_INT35
Interrupt 35 unpend
0x8
NVIC_UNPEND1_INT39
Interrupt 39 unpend
0x80
NVIC_UNPEND1_INT43
Interrupt 43 unpend
0x800
NVIC_UNPEND1_INT47
Interrupt 47 unpend
0x8000
NVIC_UNPEND1_INT51
Interrupt 51 unpend
0x80000
NVIC_UNPEND1_INT55
Interrupt 55 unpend
0x800000
NVICUNPEND2
Interrupt 64-95 Clear Pending
0x288
read-write
n
0x0
0x0
NVIC_UNPEND2_INT
Interrupt Clear Pending
0
32
NVICUNPEND3
Interrupt 96-127 Clear Pending
0x28C
read-write
n
0x0
0x0
NVIC_UNPEND3_INT
Interrupt Clear Pending
0
32
NVICUNPEND4
Interrupt 128-131 Clear Pending
0x290
read-write
n
0x0
0x0
NVIC_UNPEND4_INT
Interrupt Clear Pending
0
4
NVICVTABLE
Vector Table Offset
0xD08
read-write
n
0x0
0x0
NVIC_VTABLE_BASE
Vector Table Base
29
30
NVIC_VTABLE_OFFSET
Vector Table Offset
10
29
PEND0
Interrupt 0-31 Set Pending
0x200
-1
read-write
n
0x0
0x0
NVIC_PEND0_INT
Interrupt Set Pending
0
32
NVIC_PEND0_INT0
Interrupt 0 pend
0x1
NVIC_PEND0_INT4
Interrupt 4 pend
0x10
NVIC_PEND0_INT8
Interrupt 8 pend
0x100
NVIC_PEND0_INT12
Interrupt 12 pend
0x1000
NVIC_PEND0_INT16
Interrupt 16 pend
0x10000
NVIC_PEND0_INT20
Interrupt 20 pend
0x100000
NVIC_PEND0_INT24
Interrupt 24 pend
0x1000000
NVIC_PEND0_INT28
Interrupt 28 pend
0x10000000
NVIC_PEND0_INT1
Interrupt 1 pend
0x2
NVIC_PEND0_INT5
Interrupt 5 pend
0x20
NVIC_PEND0_INT9
Interrupt 9 pend
0x200
NVIC_PEND0_INT13
Interrupt 13 pend
0x2000
NVIC_PEND0_INT17
Interrupt 17 pend
0x20000
NVIC_PEND0_INT21
Interrupt 21 pend
0x200000
NVIC_PEND0_INT25
Interrupt 25 pend
0x2000000
NVIC_PEND0_INT29
Interrupt 29 pend
0x20000000
NVIC_PEND0_INT2
Interrupt 2 pend
0x4
NVIC_PEND0_INT6
Interrupt 6 pend
0x40
NVIC_PEND0_INT10
Interrupt 10 pend
0x400
NVIC_PEND0_INT14
Interrupt 14 pend
0x4000
NVIC_PEND0_INT18
Interrupt 18 pend
0x40000
NVIC_PEND0_INT22
Interrupt 22 pend
0x400000
NVIC_PEND0_INT26
Interrupt 26 pend
0x4000000
NVIC_PEND0_INT30
Interrupt 30 pend
0x40000000
NVIC_PEND0_INT3
Interrupt 3 pend
0x8
NVIC_PEND0_INT7
Interrupt 7 pend
0x80
NVIC_PEND0_INT11
Interrupt 11 pend
0x800
NVIC_PEND0_INT15
Interrupt 15 pend
0x8000
NVIC_PEND0_INT19
Interrupt 19 pend
0x80000
NVIC_PEND0_INT23
Interrupt 23 pend
0x800000
NVIC_PEND0_INT27
Interrupt 27 pend
0x8000000
NVIC_PEND0_INT31
Interrupt 31 pend
0x80000000
PEND1
Interrupt 32-54 Set Pending
0x204
-1
read-write
n
0x0
0x0
NVIC_PEND1_INT
Interrupt Set Pending
0
32
PEND2
Interrupt 64-95 Set Pending
0x208
-1
read-write
n
0x0
0x0
NVIC_PEND2_INT
Interrupt Set Pending
0
32
PEND3
Interrupt 96-127 Set Pending
0x20C
-1
read-write
n
0x0
0x0
NVIC_PEND3_INT
Interrupt Set Pending
0
32
PEND4
Interrupt 128-131 Set Pending
0x210
-1
read-write
n
0x0
0x0
NVIC_PEND4_INT
Interrupt Set Pending
0
4
PRI0
Interrupt 0-3 Priority
0x400
-1
read-write
n
0x0
0x0
NVIC_PRI0_INT0
Interrupt 0 Priority Mask
5
8
NVIC_PRI0_INT1
Interrupt 1 Priority Mask
13
16
NVIC_PRI0_INT2
Interrupt 2 Priority Mask
21
24
NVIC_PRI0_INT3
Interrupt 3 Priority Mask
29
32
PRI1
Interrupt 4-7 Priority
0x404
-1
read-write
n
0x0
0x0
NVIC_PRI1_INT4
Interrupt 4 Priority Mask
5
8
NVIC_PRI1_INT5
Interrupt 5 Priority Mask
13
16
NVIC_PRI1_INT6
Interrupt 6 Priority Mask
21
24
NVIC_PRI1_INT7
Interrupt 7 Priority Mask
29
32
PRI10
Interrupt 40-43 Priority
0x428
-1
read-write
n
0x0
0x0
NVIC_PRI10_INT40
Interrupt 40 Priority Mask
5
8
NVIC_PRI10_INT41
Interrupt 41 Priority Mask
13
16
NVIC_PRI10_INT42
Interrupt 42 Priority Mask
21
24
NVIC_PRI10_INT43
Interrupt 43 Priority Mask
29
32
PRI11
Interrupt 44-47 Priority
0x42C
-1
read-write
n
0x0
0x0
NVIC_PRI11_INT44
Interrupt 44 Priority Mask
5
8
NVIC_PRI11_INT45
Interrupt 45 Priority Mask
13
16
NVIC_PRI11_INT46
Interrupt 46 Priority Mask
21
24
NVIC_PRI11_INT47
Interrupt 47 Priority Mask
29
32
PRI12
Interrupt 48-51 Priority
0x430
-1
read-write
n
0x0
0x0
NVIC_PRI12_INT48
Interrupt 48 Priority Mask
5
8
NVIC_PRI12_INT49
Interrupt 49 Priority Mask
13
16
NVIC_PRI12_INT50
Interrupt 50 Priority Mask
21
24
NVIC_PRI12_INT51
Interrupt 51 Priority Mask
29
32
PRI13
Interrupt 52-53 Priority
0x434
-1
read-write
n
0x0
0x0
NVIC_PRI13_INT52
Interrupt 52 Priority Mask
5
8
NVIC_PRI13_INT53
Interrupt 53 Priority Mask
13
16
NVIC_PRI13_INT54
Interrupt 54 Priority Mask
21
24
NVIC_PRI13_INT55
Interrupt 55 Priority Mask
29
32
PRI14
Interrupt 56-59 Priority
0x438
-1
read-write
n
0x0
0x0
NVIC_PRI14_INTA
Interrupt 56 Priority Mask
5
8
NVIC_PRI14_INTB
Interrupt 57 Priority Mask
13
16
NVIC_PRI14_INTC
Interrupt 58 Priority Mask
21
24
NVIC_PRI14_INTD
Interrupt 59 Priority Mask
29
32
PRI15
Interrupt 60-63 Priority
0x43C
-1
read-write
n
0x0
0x0
NVIC_PRI15_INTA
Interrupt 60 Priority Mask
5
8
NVIC_PRI15_INTB
Interrupt 61 Priority Mask
13
16
NVIC_PRI15_INTC
Interrupt 62 Priority Mask
21
24
NVIC_PRI15_INTD
Interrupt 63 Priority Mask
29
32
PRI16
Interrupt 64-67 Priority
0x440
-1
read-write
n
0x0
0x0
NVIC_PRI16_INTA
Interrupt 64 Priority Mask
5
8
NVIC_PRI16_INTB
Interrupt 65 Priority Mask
13
16
NVIC_PRI16_INTC
Interrupt 66 Priority Mask
21
24
NVIC_PRI16_INTD
Interrupt 67 Priority Mask
29
32
PRI17
Interrupt 68-71 Priority
0x444
-1
read-write
n
0x0
0x0
NVIC_PRI17_INTA
Interrupt 68 Priority Mask
5
8
NVIC_PRI17_INTB
Interrupt 69 Priority Mask
13
16
NVIC_PRI17_INTC
Interrupt 70 Priority Mask
21
24
NVIC_PRI17_INTD
Interrupt 71 Priority Mask
29
32
PRI18
Interrupt 72-75 Priority
0x448
-1
read-write
n
0x0
0x0
NVIC_PRI18_INTA
Interrupt 72 Priority Mask
5
8
NVIC_PRI18_INTB
Interrupt 73 Priority Mask
13
16
NVIC_PRI18_INTC
Interrupt 74 Priority Mask
21
24
NVIC_PRI18_INTD
Interrupt 75 Priority Mask
29
32
PRI19
Interrupt 76-79 Priority
0x44C
-1
read-write
n
0x0
0x0
NVIC_PRI19_INTA
Interrupt 76 Priority Mask
5
8
NVIC_PRI19_INTB
Interrupt 77 Priority Mask
13
16
NVIC_PRI19_INTC
Interrupt 78 Priority Mask
21
24
NVIC_PRI19_INTD
Interrupt 79 Priority Mask
29
32
PRI2
Interrupt 8-11 Priority
0x408
-1
read-write
n
0x0
0x0
NVIC_PRI2_INT10
Interrupt 10 Priority Mask
21
24
NVIC_PRI2_INT11
Interrupt 11 Priority Mask
29
32
NVIC_PRI2_INT8
Interrupt 8 Priority Mask
5
8
NVIC_PRI2_INT9
Interrupt 9 Priority Mask
13
16
PRI20
Interrupt 80-83 Priority
0x450
-1
read-write
n
0x0
0x0
NVIC_PRI20_INTA
Interrupt 80 Priority Mask
5
8
NVIC_PRI20_INTB
Interrupt 81 Priority Mask
13
16
NVIC_PRI20_INTC
Interrupt 82 Priority Mask
21
24
NVIC_PRI20_INTD
Interrupt 83 Priority Mask
29
32
PRI21
Interrupt 84-87 Priority
0x454
-1
read-write
n
0x0
0x0
NVIC_PRI21_INTA
Interrupt 84 Priority Mask
5
8
NVIC_PRI21_INTB
Interrupt 85 Priority Mask
13
16
NVIC_PRI21_INTC
Interrupt 86 Priority Mask
21
24
NVIC_PRI21_INTD
Interrupt 87 Priority Mask
29
32
PRI22
Interrupt 88-91 Priority
0x458
-1
read-write
n
0x0
0x0
NVIC_PRI22_INTA
Interrupt 88 Priority Mask
5
8
NVIC_PRI22_INTB
Interrupt 89 Priority Mask
13
16
NVIC_PRI22_INTC
Interrupt 90 Priority Mask
21
24
NVIC_PRI22_INTD
Interrupt 91 Priority Mask
29
32
PRI23
Interrupt 92-95 Priority
0x45C
-1
read-write
n
0x0
0x0
NVIC_PRI23_INTA
Interrupt 92 Priority Mask
5
8
NVIC_PRI23_INTB
Interrupt 93 Priority Mask
13
16
NVIC_PRI23_INTC
Interrupt 94 Priority Mask
21
24
NVIC_PRI23_INTD
Interrupt 95 Priority Mask
29
32
PRI24
Interrupt 96-99 Priority
0x460
-1
read-write
n
0x0
0x0
NVIC_PRI24_INTA
Interrupt 96 Priority Mask
5
8
NVIC_PRI24_INTB
Interrupt 97 Priority Mask
13
16
NVIC_PRI24_INTC
Interrupt 98 Priority Mask
21
24
NVIC_PRI24_INTD
Interrupt 99 Priority Mask
29
32
PRI25
Interrupt 100-103 Priority
0x464
-1
read-write
n
0x0
0x0
NVIC_PRI25_INTA
Interrupt 100 Priority Mask
5
8
NVIC_PRI25_INTB
Interrupt 101 Priority Mask
13
16
NVIC_PRI25_INTC
Interrupt 102 Priority Mask
21
24
NVIC_PRI25_INTD
Interrupt 103 Priority Mask
29
32
PRI26
Interrupt 104-107 Priority
0x468
-1
read-write
n
0x0
0x0
NVIC_PRI26_INTA
Interrupt 104 Priority Mask
5
8
NVIC_PRI26_INTB
Interrupt 105 Priority Mask
13
16
NVIC_PRI26_INTC
Interrupt 106 Priority Mask
21
24
NVIC_PRI26_INTD
Interrupt 107 Priority Mask
29
32
PRI27
Interrupt 108-111 Priority
0x46C
-1
read-write
n
0x0
0x0
NVIC_PRI27_INTA
Interrupt 108 Priority Mask
5
8
NVIC_PRI27_INTB
Interrupt 109 Priority Mask
13
16
NVIC_PRI27_INTC
Interrupt 110 Priority Mask
21
24
NVIC_PRI27_INTD
Interrupt 111 Priority Mask
29
32
PRI28
Interrupt 112-115 Priority
0x470
-1
read-write
n
0x0
0x0
NVIC_PRI28_INTA
Interrupt 112 Priority Mask
5
8
NVIC_PRI28_INTB
Interrupt 113 Priority Mask
13
16
NVIC_PRI28_INTC
Interrupt 114 Priority Mask
21
24
NVIC_PRI28_INTD
Interrupt 115 Priority Mask
29
32
PRI29
Interrupt 116-119 Priority
0x474
-1
read-write
n
0x0
0x0
NVIC_PRI29_INTA
Interrupt 116 Priority Mask
5
8
NVIC_PRI29_INTB
Interrupt 117 Priority Mask
13
16
NVIC_PRI29_INTC
Interrupt 118 Priority Mask
21
24
NVIC_PRI29_INTD
Interrupt 119 Priority Mask
29
32
PRI3
Interrupt 12-15 Priority
0x40C
-1
read-write
n
0x0
0x0
NVIC_PRI3_INT12
Interrupt 12 Priority Mask
5
8
NVIC_PRI3_INT13
Interrupt 13 Priority Mask
13
16
NVIC_PRI3_INT14
Interrupt 14 Priority Mask
21
24
NVIC_PRI3_INT15
Interrupt 15 Priority Mask
29
32
PRI30
Interrupt 120-123 Priority
0x478
-1
read-write
n
0x0
0x0
NVIC_PRI30_INTA
Interrupt 120 Priority Mask
5
8
NVIC_PRI30_INTB
Interrupt 121 Priority Mask
13
16
NVIC_PRI30_INTC
Interrupt 122 Priority Mask
21
24
NVIC_PRI30_INTD
Interrupt 123 Priority Mask
29
32
PRI31
Interrupt 124-127 Priority
0x47C
-1
read-write
n
0x0
0x0
NVIC_PRI31_INTA
Interrupt 124 Priority Mask
5
8
NVIC_PRI31_INTB
Interrupt 125 Priority Mask
13
16
NVIC_PRI31_INTC
Interrupt 126 Priority Mask
21
24
NVIC_PRI31_INTD
Interrupt 127 Priority Mask
29
32
PRI32
Interrupt 128-131 Priority
0x480
-1
read-write
n
0x0
0x0
NVIC_PRI32_INTA
Interrupt 128 Priority Mask
5
8
NVIC_PRI32_INTB
Interrupt 129 Priority Mask
13
16
NVIC_PRI32_INTC
Interrupt 130 Priority Mask
21
24
NVIC_PRI32_INTD
Interrupt 131 Priority Mask
29
32
PRI4
Interrupt 16-19 Priority
0x410
-1
read-write
n
0x0
0x0
NVIC_PRI4_INT16
Interrupt 16 Priority Mask
5
8
NVIC_PRI4_INT17
Interrupt 17 Priority Mask
13
16
NVIC_PRI4_INT18
Interrupt 18 Priority Mask
21
24
NVIC_PRI4_INT19
Interrupt 19 Priority Mask
29
32
PRI5
Interrupt 20-23 Priority
0x414
-1
read-write
n
0x0
0x0
NVIC_PRI5_INT20
Interrupt 20 Priority Mask
5
8
NVIC_PRI5_INT21
Interrupt 21 Priority Mask
13
16
NVIC_PRI5_INT22
Interrupt 22 Priority Mask
21
24
NVIC_PRI5_INT23
Interrupt 23 Priority Mask
29
32
PRI6
Interrupt 24-27 Priority
0x418
-1
read-write
n
0x0
0x0
NVIC_PRI6_INT24
Interrupt 24 Priority Mask
5
8
NVIC_PRI6_INT25
Interrupt 25 Priority Mask
13
16
NVIC_PRI6_INT26
Interrupt 26 Priority Mask
21
24
NVIC_PRI6_INT27
Interrupt 27 Priority Mask
29
32
PRI7
Interrupt 28-31 Priority
0x41C
-1
read-write
n
0x0
0x0
NVIC_PRI7_INT28
Interrupt 28 Priority Mask
5
8
NVIC_PRI7_INT29
Interrupt 29 Priority Mask
13
16
NVIC_PRI7_INT30
Interrupt 30 Priority Mask
21
24
NVIC_PRI7_INT31
Interrupt 31 Priority Mask
29
32
PRI8
Interrupt 32-35 Priority
0x420
-1
read-write
n
0x0
0x0
NVIC_PRI8_INT32
Interrupt 32 Priority Mask
5
8
NVIC_PRI8_INT33
Interrupt 33 Priority Mask
13
16
NVIC_PRI8_INT34
Interrupt 34 Priority Mask
21
24
NVIC_PRI8_INT35
Interrupt 35 Priority Mask
29
32
PRI9
Interrupt 36-39 Priority
0x424
-1
read-write
n
0x0
0x0
NVIC_PRI9_INT36
Interrupt 36 Priority Mask
5
8
NVIC_PRI9_INT37
Interrupt 37 Priority Mask
13
16
NVIC_PRI9_INT38
Interrupt 38 Priority Mask
21
24
NVIC_PRI9_INT39
Interrupt 39 Priority Mask
29
32
ST_CAL
SysTick Calibration Value Reg
0x1C
-1
read-write
n
0x0
0x0
NVIC_ST_CAL_NOREF
No reference clock
31
32
NVIC_ST_CAL_ONEMS
1ms reference value
0
24
NVIC_ST_CAL_SKEW
Clock skew
30
31
ST_CTRL
SysTick Control and Status Register
0x10
-1
read-write
n
0x0
0x0
NVIC_ST_CTRL_CLK_SRC
Clock Source
2
3
NVIC_ST_CTRL_COUNT
Count Flag
16
17
NVIC_ST_CTRL_ENABLE
Enable
0
1
NVIC_ST_CTRL_INTEN
Interrupt Enable
1
2
ST_CURRENT
SysTick Current Value Register
0x18
-1
read-write
n
0x0
0x0
NVIC_ST_CURRENT
Current Value
0
24
ST_RELOAD
SysTick Reload Value Register
0x14
-1
read-write
n
0x0
0x0
NVIC_ST_RELOAD
Reload Value
0
24
SW_TRIG
Software Trigger Interrupt
0xF00
-1
write-only
n
0x0
0x0
NVIC_SW_TRIG_INTID
Interrupt ID
0
8
write-only
SYS_CTRL
System Control
0xD10
-1
read-write
n
0x0
0x0
NVIC_SYS_CTRL_SEVONPEND
Wake Up on Pending
4
5
NVIC_SYS_CTRL_SLEEPDEEP
Deep Sleep Enable
2
3
NVIC_SYS_CTRL_SLEEPEXIT
Sleep on ISR Exit
1
2
SYS_HND_CTRL
System Handler Control and State
0xD24
-1
read-write
n
0x0
0x0
NVIC_SYS_HND_CTRL_BUS
Bus Fault Enable
17
18
NVIC_SYS_HND_CTRL_BUSA
Bus Fault Active
1
2
NVIC_SYS_HND_CTRL_BUSP
Bus Fault Pending
14
15
NVIC_SYS_HND_CTRL_MEM
Memory Management Fault Enable
16
17
NVIC_SYS_HND_CTRL_MEMA
Memory Management Fault Active
0
1
NVIC_SYS_HND_CTRL_MEMP
Memory Management Fault Pending
13
14
NVIC_SYS_HND_CTRL_MON
Debug Monitor Active
8
9
NVIC_SYS_HND_CTRL_PNDSV
PendSV Exception Active
10
11
NVIC_SYS_HND_CTRL_SVC
SVC Call Pending
15
16
NVIC_SYS_HND_CTRL_SVCA
SVC Call Active
7
8
NVIC_SYS_HND_CTRL_TICK
SysTick Exception Active
11
12
NVIC_SYS_HND_CTRL_USAGE
Usage Fault Enable
18
19
NVIC_SYS_HND_CTRL_USAGEP
Usage Fault Pending
12
13
NVIC_SYS_HND_CTRL_USGA
Usage Fault Active
3
4
SYS_PRI1
System Handler Priority 1
0xD18
-1
read-write
n
0x0
0x0
NVIC_SYS_PRI1_BUS
Bus Fault Priority
13
16
NVIC_SYS_PRI1_MEM
Memory Management Fault Priority
5
8
NVIC_SYS_PRI1_USAGE
Usage Fault Priority
21
24
SYS_PRI2
System Handler Priority 2
0xD1C
-1
read-write
n
0x0
0x0
NVIC_SYS_PRI2_SVC
SVCall Priority
29
32
SYS_PRI3
System Handler Priority 3
0xD20
-1
read-write
n
0x0
0x0
NVIC_SYS_PRI3_DEBUG
Debug Priority
5
8
NVIC_SYS_PRI3_PENDSV
PendSV Priority
21
24
NVIC_SYS_PRI3_TICK
SysTick Exception Priority
29
32
UNPEND0
Interrupt 0-31 Clear Pending
0x280
-1
read-write
n
0x0
0x0
NVIC_UNPEND0_INT
Interrupt Clear Pending
0
32
NVIC_UNPEND0_INT0
Interrupt 0 unpend
0x1
NVIC_UNPEND0_INT4
Interrupt 4 unpend
0x10
NVIC_UNPEND0_INT8
Interrupt 8 unpend
0x100
NVIC_UNPEND0_INT12
Interrupt 12 unpend
0x1000
NVIC_UNPEND0_INT16
Interrupt 16 unpend
0x10000
NVIC_UNPEND0_INT20
Interrupt 20 unpend
0x100000
NVIC_UNPEND0_INT24
Interrupt 24 unpend
0x1000000
NVIC_UNPEND0_INT28
Interrupt 28 unpend
0x10000000
NVIC_UNPEND0_INT1
Interrupt 1 unpend
0x2
NVIC_UNPEND0_INT5
Interrupt 5 unpend
0x20
NVIC_UNPEND0_INT9
Interrupt 9 unpend
0x200
NVIC_UNPEND0_INT13
Interrupt 13 unpend
0x2000
NVIC_UNPEND0_INT17
Interrupt 17 unpend
0x20000
NVIC_UNPEND0_INT21
Interrupt 21 unpend
0x200000
NVIC_UNPEND0_INT25
Interrupt 25 unpend
0x2000000
NVIC_UNPEND0_INT29
Interrupt 29 unpend
0x20000000
NVIC_UNPEND0_INT2
Interrupt 2 unpend
0x4
NVIC_UNPEND0_INT6
Interrupt 6 unpend
0x40
NVIC_UNPEND0_INT10
Interrupt 10 unpend
0x400
NVIC_UNPEND0_INT14
Interrupt 14 unpend
0x4000
NVIC_UNPEND0_INT18
Interrupt 18 unpend
0x40000
NVIC_UNPEND0_INT22
Interrupt 22 unpend
0x400000
NVIC_UNPEND0_INT26
Interrupt 26 unpend
0x4000000
NVIC_UNPEND0_INT30
Interrupt 30 unpend
0x40000000
NVIC_UNPEND0_INT3
Interrupt 3 unpend
0x8
NVIC_UNPEND0_INT7
Interrupt 7 unpend
0x80
NVIC_UNPEND0_INT11
Interrupt 11 unpend
0x800
NVIC_UNPEND0_INT15
Interrupt 15 unpend
0x8000
NVIC_UNPEND0_INT19
Interrupt 19 unpend
0x80000
NVIC_UNPEND0_INT23
Interrupt 23 unpend
0x800000
NVIC_UNPEND0_INT27
Interrupt 27 unpend
0x8000000
NVIC_UNPEND0_INT31
Interrupt 31 unpend
0x80000000
UNPEND1
Interrupt 32-54 Clear Pending
0x284
-1
read-write
n
0x0
0x0
NVIC_UNPEND1_INT
Interrupt Clear Pending
0
32
NVIC_UNPEND1_INT32
Interrupt 32 unpend
0x1
NVIC_UNPEND1_INT36
Interrupt 36 unpend
0x10
NVIC_UNPEND1_INT40
Interrupt 40 unpend
0x100
NVIC_UNPEND1_INT44
Interrupt 44 unpend
0x1000
NVIC_UNPEND1_INT48
Interrupt 48 unpend
0x10000
NVIC_UNPEND1_INT52
Interrupt 52 unpend
0x100000
NVIC_UNPEND1_INT33
Interrupt 33 unpend
0x2
NVIC_UNPEND1_INT37
Interrupt 37 unpend
0x20
NVIC_UNPEND1_INT41
Interrupt 41 unpend
0x200
NVIC_UNPEND1_INT45
Interrupt 45 unpend
0x2000
NVIC_UNPEND1_INT49
Interrupt 49 unpend
0x20000
NVIC_UNPEND1_INT53
Interrupt 53 unpend
0x200000
NVIC_UNPEND1_INT34
Interrupt 34 unpend
0x4
NVIC_UNPEND1_INT38
Interrupt 38 unpend
0x40
NVIC_UNPEND1_INT42
Interrupt 42 unpend
0x400
NVIC_UNPEND1_INT46
Interrupt 46 unpend
0x4000
NVIC_UNPEND1_INT50
Interrupt 50 unpend
0x40000
NVIC_UNPEND1_INT54
Interrupt 54 unpend
0x400000
NVIC_UNPEND1_INT35
Interrupt 35 unpend
0x8
NVIC_UNPEND1_INT39
Interrupt 39 unpend
0x80
NVIC_UNPEND1_INT43
Interrupt 43 unpend
0x800
NVIC_UNPEND1_INT47
Interrupt 47 unpend
0x8000
NVIC_UNPEND1_INT51
Interrupt 51 unpend
0x80000
NVIC_UNPEND1_INT55
Interrupt 55 unpend
0x800000
UNPEND2
Interrupt 64-95 Clear Pending
0x288
-1
read-write
n
0x0
0x0
NVIC_UNPEND2_INT
Interrupt Clear Pending
0
32
UNPEND3
Interrupt 96-127 Clear Pending
0x28C
-1
read-write
n
0x0
0x0
NVIC_UNPEND3_INT
Interrupt Clear Pending
0
32
UNPEND4
Interrupt 128-131 Clear Pending
0x290
-1
read-write
n
0x0
0x0
NVIC_UNPEND4_INT
Interrupt Clear Pending
0
4
VTABLE
Vector Table Offset
0xD08
-1
read-write
n
0x0
0x0
NVIC_VTABLE_BASE
Vector Table Base
29
30
NVIC_VTABLE_OFFSET
Vector Table Offset
10
29
SSI0
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI1
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI2
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI3
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
Either the system clock (if the PLL bypass is in effect) or the PLL output (default)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x1
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Texas Instruments Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SYSCTL
Register map for SYSCTL peripheral
SYSCTL
0x0
0x0
0x1000
registers
n
DC0
Device Capabilities 0
0x8
-1
read-write
n
0x0
0x0
SYSCTL_DC0_FLASHSZ
Flash Size
0
16
SYSCTL_DC0_FLASHSZ_64KB
64 KB of Flash
0x1f
SYSCTL_DC0_FLASHSZ_96KB
96 KB of Flash
0x2f
SYSCTL_DC0_FLASHSZ_8KB
8 KB of Flash
0x3
SYSCTL_DC0_FLASHSZ_128K
128 KB of Flash
0x3f
SYSCTL_DC0_FLASHSZ_192K
192 KB of Flash
0x5f
SYSCTL_DC0_FLASHSZ_16KB
16 KB of Flash
0x7
SYSCTL_DC0_FLASHSZ_256K
256 KB of Flash
0x7f
SYSCTL_DC0_FLASHSZ_32KB
32 KB of Flash
0xf
SYSCTL_DC0_SRAMSZ
SRAM Size
16
32
SYSCTL_DC0_SRAMSZ_6KB
6 KB of SRAM
0x17
SYSCTL_DC0_SRAMSZ_8KB
8 KB of SRAM
0x1f
SYSCTL_DC0_SRAMSZ_12KB
12 KB of SRAM
0x2f
SYSCTL_DC0_SRAMSZ_16KB
16 KB of SRAM
0x3f
SYSCTL_DC0_SRAMSZ_20KB
20 KB of SRAM
0x4f
SYSCTL_DC0_SRAMSZ_24KB
24 KB of SRAM
0x5f
SYSCTL_DC0_SRAMSZ_2KB
2 KB of SRAM
0x7
SYSCTL_DC0_SRAMSZ_32KB
32 KB of SRAM
0x7f
SYSCTL_DC0_SRAMSZ_4KB
4 KB of SRAM
0xf
DC1
Device Capabilities 1
0x10
-1
read-write
n
0x0
0x0
SYSCTL_DC1_ADC0
ADC Module 0 Present
16
17
SYSCTL_DC1_ADC0SPD
Max ADC0 Speed
8
10
SYSCTL_DC1_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_DC1_ADC1
ADC Module 1 Present
17
18
SYSCTL_DC1_ADC1SPD
Max ADC1 Speed
10
12
SYSCTL_DC1_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_DC1_CAN0
CAN Module 0 Present
24
25
SYSCTL_DC1_CAN1
CAN Module 1 Present
25
26
SYSCTL_DC1_HIB
Hibernation Module Present
6
7
SYSCTL_DC1_JTAG
JTAG Present
0
1
SYSCTL_DC1_MINSYSDIV
System Clock Divider
12
16
SYSCTL_DC1_MINSYSDIV_100
Divide VCO (400MHZ) by 5 minimum
0x1
SYSCTL_DC1_MINSYSDIV_66
Divide VCO (400MHZ) by 2*2 + 2 = 6 minimum
0x2
SYSCTL_DC1_MINSYSDIV_50
Specifies a 50-MHz CPU clock with a PLL divider of 4
0x3
SYSCTL_DC1_MINSYSDIV_40
Specifies a 40-MHz CPU clock with a PLL divider of 5
0x4
SYSCTL_DC1_MINSYSDIV_25
Specifies a 25-MHz clock with a PLL divider of 8
0x7
SYSCTL_DC1_MINSYSDIV_20
Specifies a 20-MHz clock with a PLL divider of 10
0x9
SYSCTL_DC1_MPU
MPU Present
7
8
SYSCTL_DC1_PLL
PLL Present
4
5
SYSCTL_DC1_PWM0
PWM Module 0 Present
20
21
SYSCTL_DC1_PWM1
PWM Module 1 Present
21
22
SYSCTL_DC1_SWD
SWD Present
1
2
SYSCTL_DC1_SWO
SWO Trace Port Present
2
3
SYSCTL_DC1_TEMP
Temp Sensor Present
5
6
SYSCTL_DC1_WDT0
Watchdog Timer 0 Present
3
4
SYSCTL_DC1_WDT1
Watchdog Timer1 Present
28
29
DC2
Device Capabilities 2
0x14
-1
read-write
n
0x0
0x0
SYSCTL_DC2_COMP0
Analog Comparator 0 Present
24
25
SYSCTL_DC2_COMP1
Analog Comparator 1 Present
25
26
SYSCTL_DC2_COMP2
Analog Comparator 2 Present
26
27
SYSCTL_DC2_EPI0
EPI Module 0 Present
30
31
SYSCTL_DC2_I2C0
I2C Module 0 Present
12
13
SYSCTL_DC2_I2C0HS
I2C Module 0 Speed
13
14
SYSCTL_DC2_I2C1
I2C Module 1 Present
14
15
SYSCTL_DC2_I2C1HS
I2C Module 1 Speed
15
16
SYSCTL_DC2_I2S0
I2S Module 0 Present
28
29
SYSCTL_DC2_QEI0
QEI Module 0 Present
8
9
SYSCTL_DC2_QEI1
QEI Module 1 Present
9
10
SYSCTL_DC2_SSI0
SSI Module 0 Present
4
5
SYSCTL_DC2_SSI1
SSI Module 1 Present
5
6
SYSCTL_DC2_TIMER0
Timer Module 0 Present
16
17
SYSCTL_DC2_TIMER1
Timer Module 1 Present
17
18
SYSCTL_DC2_TIMER2
Timer Module 2 Present
18
19
SYSCTL_DC2_TIMER3
Timer Module 3 Present
19
20
SYSCTL_DC2_UART0
UART Module 0 Present
0
1
SYSCTL_DC2_UART1
UART Module 1 Present
1
2
SYSCTL_DC2_UART2
UART Module 2 Present
2
3
DC3
Device Capabilities 3
0x18
-1
read-write
n
0x0
0x0
SYSCTL_DC3_32KHZ
32KHz Input Clock Available
31
32
SYSCTL_DC3_ADC0AIN0
ADC Module 0 AIN0 Pin Present
16
17
SYSCTL_DC3_ADC0AIN1
ADC Module 0 AIN1 Pin Present
17
18
SYSCTL_DC3_ADC0AIN2
ADC Module 0 AIN2 Pin Present
18
19
SYSCTL_DC3_ADC0AIN3
ADC Module 0 AIN3 Pin Present
19
20
SYSCTL_DC3_ADC0AIN4
ADC Module 0 AIN4 Pin Present
20
21
SYSCTL_DC3_ADC0AIN5
ADC Module 0 AIN5 Pin Present
21
22
SYSCTL_DC3_ADC0AIN6
ADC Module 0 AIN6 Pin Present
22
23
SYSCTL_DC3_ADC0AIN7
ADC Module 0 AIN7 Pin Present
23
24
SYSCTL_DC3_C0MINUS
C0- Pin Present
6
7
SYSCTL_DC3_C0O
C0o Pin Present
8
9
SYSCTL_DC3_C0PLUS
C0+ Pin Present
7
8
SYSCTL_DC3_C1MINUS
C1- Pin Present
9
10
SYSCTL_DC3_C1O
C1o Pin Present
11
12
SYSCTL_DC3_C1PLUS
C1+ Pin Present
10
11
SYSCTL_DC3_C2MINUS
C2- Pin Present
12
13
SYSCTL_DC3_C2O
C2o Pin Present
14
15
SYSCTL_DC3_C2PLUS
C2+ Pin Present
13
14
SYSCTL_DC3_CCP0
CCP0 Pin Present
24
25
SYSCTL_DC3_CCP1
CCP1 Pin Present
25
26
SYSCTL_DC3_CCP2
CCP2 Pin Present
26
27
SYSCTL_DC3_CCP3
CCP3 Pin Present
27
28
SYSCTL_DC3_CCP4
CCP4 Pin Present
28
29
SYSCTL_DC3_CCP5
CCP5 Pin Present
29
30
SYSCTL_DC3_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC3_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC3_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC3_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC3_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC3_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC3_PWMFAULT
PWM Fault Pin Present
15
16
DC4
Device Capabilities 4
0x1C
-1
read-write
n
0x0
0x0
SYSCTL_DC4_CCP6
CCP6 Pin Present
14
15
SYSCTL_DC4_CCP7
CCP7 Pin Present
15
16
SYSCTL_DC4_E1588
1588 Capable
24
25
SYSCTL_DC4_EMAC0
Ethernet MAC Layer 0 Present
28
29
SYSCTL_DC4_EPHY0
Ethernet PHY Layer 0 Present
30
31
SYSCTL_DC4_GPIOA
GPIO Port A Present
0
1
SYSCTL_DC4_GPIOB
GPIO Port B Present
1
2
SYSCTL_DC4_GPIOC
GPIO Port C Present
2
3
SYSCTL_DC4_GPIOD
GPIO Port D Present
3
4
SYSCTL_DC4_GPIOE
GPIO Port E Present
4
5
SYSCTL_DC4_GPIOF
GPIO Port F Present
5
6
SYSCTL_DC4_GPIOG
GPIO Port G Present
6
7
SYSCTL_DC4_GPIOH
GPIO Port H Present
7
8
SYSCTL_DC4_GPIOJ
GPIO Port J Present
8
9
SYSCTL_DC4_PICAL
PIOSC Calibrate
18
19
SYSCTL_DC4_ROM
Internal Code ROM Present
12
13
SYSCTL_DC4_UDMA
Micro-DMA Module Present
13
14
DC5
Device Capabilities 5
0x20
-1
read-write
n
0x0
0x0
SYSCTL_DC5_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC5_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC5_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC5_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC5_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC5_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC5_PWM6
PWM6 Pin Present
6
7
SYSCTL_DC5_PWM7
PWM7 Pin Present
7
8
SYSCTL_DC5_PWMEFLT
PWM Extended Fault Active
21
22
SYSCTL_DC5_PWMESYNC
PWM Extended SYNC Active
20
21
SYSCTL_DC5_PWMFAULT0
PWM Fault 0 Pin Present
24
25
SYSCTL_DC5_PWMFAULT1
PWM Fault 1 Pin Present
25
26
SYSCTL_DC5_PWMFAULT2
PWM Fault 2 Pin Present
26
27
SYSCTL_DC5_PWMFAULT3
PWM Fault 3 Pin Present
27
28
DC6
Device Capabilities 6
0x24
-1
read-write
n
0x0
0x0
SYSCTL_DC6_USB0
USB Module 0 Present
0
2
SYSCTL_DC6_USB0_DEV
USB0 is Device Only
0x1
SYSCTL_DC6_USB0_HOSTDEV
USB is Device or Host
0x2
SYSCTL_DC6_USB0_OTG
USB0 is OTG
0x3
SYSCTL_DC6_USB0PHY
USB Module 0 PHY Present
4
5
DC7
Device Capabilities 7
0x28
-1
read-write
n
0x0
0x0
SYSCTL_DC7_DMACH0
USB_EP1_RX / UART2_RX
0
1
SYSCTL_DC7_DMACH1
USB_EP1_TX / UART2_TX
1
2
SYSCTL_DC7_DMACH10
SSI0_RX / SSI1_RX
10
11
SYSCTL_DC7_DMACH11
SSI0_TX / SSI1_TX
11
12
SYSCTL_DC7_DMACH12
CAN0_RX / UART2_RX
12
13
SYSCTL_DC7_DMACH13
CAN0_TX / UART2_TX
13
14
SYSCTL_DC7_DMACH14
ADC0_SS0 / Timer2A
14
15
SYSCTL_DC7_DMACH15
ADC0_SS1 / Timer2B
15
16
SYSCTL_DC7_DMACH16
ADC0_SS2
16
17
SYSCTL_DC7_DMACH17
ADC0_SS3
17
18
SYSCTL_DC7_DMACH18
Timer0A / Timer1A
18
19
SYSCTL_DC7_DMACH19
Timer0B / Timer1B
19
20
SYSCTL_DC7_DMACH2
USB_EP2_RX / Timer3A
2
3
SYSCTL_DC7_DMACH20
Timer1A / EPI0_NBRFIFO
20
21
SYSCTL_DC7_DMACH21
Timer1B / EPI0_WFIFO
21
22
SYSCTL_DC7_DMACH22
UART1_RX / CAN2_RX
22
23
SYSCTL_DC7_DMACH23
UART1_TX / CAN2_TX
23
24
SYSCTL_DC7_DMACH24
SSI1_RX / ADC1_SS0
24
25
SYSCTL_DC7_DMACH25
SSI1_TX / ADC1_SS1
25
26
SYSCTL_DC7_DMACH26
CAN1_RX / ADC1_SS2
26
27
SYSCTL_DC7_DMACH27
CAN1_TX / ADC1_SS3
27
28
SYSCTL_DC7_DMACH28
I2S0_RX / CAN1_RX
28
29
SYSCTL_DC7_DMACH29
I2S0_TX / CAN1_TX
29
30
SYSCTL_DC7_DMACH3
USB_EP2_TX / Timer3B
3
4
SYSCTL_DC7_DMACH30
SW
30
31
SYSCTL_DC7_DMACH4
USB_EP3_RX / Timer2A
4
5
SYSCTL_DC7_DMACH5
USB_EP3_TX / Timer2B
5
6
SYSCTL_DC7_DMACH6
ETH_RX / Timer2A
6
7
SYSCTL_DC7_DMACH7
ETH_TX / Timer2B
7
8
SYSCTL_DC7_DMACH8
UART0_RX / UART1_RX
8
9
SYSCTL_DC7_DMACH9
UART0_TX / UART1_TX
9
10
DC8
Device Capabilities 8 ADC Channels
0x2C
-1
read-write
n
0x0
0x0
SYSCTL_DC8_ADC0AIN0
ADC Module 0 AIN0 Pin Present
0
1
SYSCTL_DC8_ADC0AIN1
ADC Module 0 AIN1 Pin Present
1
2
SYSCTL_DC8_ADC0AIN10
ADC Module 0 AIN10 Pin Present
10
11
SYSCTL_DC8_ADC0AIN11
ADC Module 0 AIN11 Pin Present
11
12
SYSCTL_DC8_ADC0AIN12
ADC Module 0 AIN12 Pin Present
12
13
SYSCTL_DC8_ADC0AIN13
ADC Module 0 AIN13 Pin Present
13
14
SYSCTL_DC8_ADC0AIN14
ADC Module 0 AIN14 Pin Present
14
15
SYSCTL_DC8_ADC0AIN15
ADC Module 0 AIN15 Pin Present
15
16
SYSCTL_DC8_ADC0AIN2
ADC Module 0 AIN2 Pin Present
2
3
SYSCTL_DC8_ADC0AIN3
ADC Module 0 AIN3 Pin Present
3
4
SYSCTL_DC8_ADC0AIN4
ADC Module 0 AIN4 Pin Present
4
5
SYSCTL_DC8_ADC0AIN5
ADC Module 0 AIN5 Pin Present
5
6
SYSCTL_DC8_ADC0AIN6
ADC Module 0 AIN6 Pin Present
6
7
SYSCTL_DC8_ADC0AIN7
ADC Module 0 AIN7 Pin Present
7
8
SYSCTL_DC8_ADC0AIN8
ADC Module 0 AIN8 Pin Present
8
9
SYSCTL_DC8_ADC0AIN9
ADC Module 0 AIN9 Pin Present
9
10
SYSCTL_DC8_ADC1AIN0
ADC Module 1 AIN0 Pin Present
16
17
SYSCTL_DC8_ADC1AIN1
ADC Module 1 AIN1 Pin Present
17
18
SYSCTL_DC8_ADC1AIN10
ADC Module 1 AIN10 Pin Present
26
27
SYSCTL_DC8_ADC1AIN11
ADC Module 1 AIN11 Pin Present
27
28
SYSCTL_DC8_ADC1AIN12
ADC Module 1 AIN12 Pin Present
28
29
SYSCTL_DC8_ADC1AIN13
ADC Module 1 AIN13 Pin Present
29
30
SYSCTL_DC8_ADC1AIN14
ADC Module 1 AIN14 Pin Present
30
31
SYSCTL_DC8_ADC1AIN15
ADC Module 1 AIN15 Pin Present
31
32
SYSCTL_DC8_ADC1AIN2
ADC Module 1 AIN2 Pin Present
18
19
SYSCTL_DC8_ADC1AIN3
ADC Module 1 AIN3 Pin Present
19
20
SYSCTL_DC8_ADC1AIN4
ADC Module 1 AIN4 Pin Present
20
21
SYSCTL_DC8_ADC1AIN5
ADC Module 1 AIN5 Pin Present
21
22
SYSCTL_DC8_ADC1AIN6
ADC Module 1 AIN6 Pin Present
22
23
SYSCTL_DC8_ADC1AIN7
ADC Module 1 AIN7 Pin Present
23
24
SYSCTL_DC8_ADC1AIN8
ADC Module 1 AIN8 Pin Present
24
25
SYSCTL_DC8_ADC1AIN9
ADC Module 1 AIN9 Pin Present
25
26
DC9
Device Capabilities 9 ADC Digital Comparators
0x190
-1
read-write
n
0x0
0x0
SYSCTL_DC9_ADC0DC0
ADC0 DC0 Present
0
1
SYSCTL_DC9_ADC0DC1
ADC0 DC1 Present
1
2
SYSCTL_DC9_ADC0DC2
ADC0 DC2 Present
2
3
SYSCTL_DC9_ADC0DC3
ADC0 DC3 Present
3
4
SYSCTL_DC9_ADC0DC4
ADC0 DC4 Present
4
5
SYSCTL_DC9_ADC0DC5
ADC0 DC5 Present
5
6
SYSCTL_DC9_ADC0DC6
ADC0 DC6 Present
6
7
SYSCTL_DC9_ADC0DC7
ADC0 DC7 Present
7
8
SYSCTL_DC9_ADC1DC0
ADC1 DC0 Present
16
17
SYSCTL_DC9_ADC1DC1
ADC1 DC1 Present
17
18
SYSCTL_DC9_ADC1DC2
ADC1 DC2 Present
18
19
SYSCTL_DC9_ADC1DC3
ADC1 DC3 Present
19
20
SYSCTL_DC9_ADC1DC4
ADC1 DC4 Present
20
21
SYSCTL_DC9_ADC1DC5
ADC1 DC5 Present
21
22
SYSCTL_DC9_ADC1DC6
ADC1 DC6 Present
22
23
SYSCTL_DC9_ADC1DC7
ADC1 DC7 Present
23
24
DCGC0
Deep Sleep Mode Clock Gating Control Register 0
0x120
-1
read-write
n
0x0
0x0
SYSCTL_DCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_DCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_DCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_DCGC0_CAN1
CAN1 Clock Gating Control
25
26
SYSCTL_DCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_DCGC0_PWM0
PWM Clock Gating Control
20
21
SYSCTL_DCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_DCGC0_WDT1
WDT1 Clock Gating Control
28
29
DCGC1
Deep-Sleep Mode Clock Gating Control Register 1
0x124
-1
read-write
n
0x0
0x0
SYSCTL_DCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_DCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_DCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_DCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_DCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_DCGC1_QEI0
QEI0 Clock Gating Control
8
9
SYSCTL_DCGC1_QEI1
QEI1 Clock Gating Control
9
10
SYSCTL_DCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_DCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_DCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_DCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_DCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_DCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_DCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_DCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_DCGC1_UART2
UART2 Clock Gating Control
2
3
DCGC2
Deep Sleep Mode Clock Gating Control Register 2
0x128
-1
read-write
n
0x0
0x0
SYSCTL_DCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_DCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_DCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_DCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_DCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_DCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_DCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_DCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_DCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_DCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTL_DCGC2_USB0
USB0 Clock Gating Control
16
17
DCGCACMP
Analog Comparator Deep-Sleep Mode Clock Gating Control
0x83C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCACMP_D0
Analog Comparator Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCADC
Analog-to-Digital Converter Deep-Sleep Mode Clock Gating Control
0x838
-1
read-write
n
0x0
0x0
SYSCTL_DCGCADC_D0
ADC Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCADC_D1
ADC Module 1 Deep-Sleep Mode Clock Gating Control
1
2
DCGCCAN
Controller Area Network Deep-Sleep Mode Clock Gating Control
0x834
-1
read-write
n
0x0
0x0
SYSCTL_DCGCCAN_D0
CAN Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCCAN_D1
CAN Module 1 Deep-Sleep Mode Clock Gating Control
1
2
DCGCDMA
Micro Direct Memory Access Deep-Sleep Mode Clock Gating Control
0x80C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCDMA_D0
uDMA Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCEEPROM
EEPROM Deep-Sleep Mode Clock Gating Control
0x858
-1
read-write
n
0x0
0x0
SYSCTL_DCGCEEPROM_D0
EEPROM Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCGPIO
General-Purpose Input/Output Deep-Sleep Mode Clock Gating Control
0x808
-1
read-write
n
0x0
0x0
SYSCTL_DCGCGPIO_D0
GPIO Port A Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCGPIO_D1
GPIO Port B Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCGPIO_D10
GPIO Port L Deep-Sleep Mode Clock Gating Control
10
11
SYSCTL_DCGCGPIO_D11
GPIO Port M Deep-Sleep Mode Clock Gating Control
11
12
SYSCTL_DCGCGPIO_D12
GPIO Port N Deep-Sleep Mode Clock Gating Control
12
13
SYSCTL_DCGCGPIO_D13
GPIO Port P Deep-Sleep Mode Clock Gating Control
13
14
SYSCTL_DCGCGPIO_D14
GPIO Port Q Deep-Sleep Mode Clock Gating Control
14
15
SYSCTL_DCGCGPIO_D2
GPIO Port C Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCGPIO_D3
GPIO Port D Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCGPIO_D4
GPIO Port E Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCGPIO_D5
GPIO Port F Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCGPIO_D6
GPIO Port G Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCGPIO_D7
0Mode Clock Gating Control
7
8
SYSCTL_DCGCGPIO_D8
GPIO Port J Deep-Sleep Mode Clock Gating Control
8
9
SYSCTL_DCGCGPIO_D9
GPIO Port K Deep-Sleep Mode Clock Gating Control
9
10
DCGCI2C
Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control
0x820
-1
read-write
n
0x0
0x0
SYSCTL_DCGCI2C_D0
I2C Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCI2C_D1
I2C Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCI2C_D2
I2C Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCI2C_D3
I2C Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCI2C_D4
I2C Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCI2C_D5
I2C Module 5 Deep-Sleep Mode Clock Gating Control
5
6
DCGCSSI
Synchronous Serial Interface Deep-Sleep Mode Clock Gating Control
0x81C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCSSI_D0
SSI Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCSSI_D1
SSI Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCSSI_D2
SSI Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCSSI_D3
SSI Module 3 Deep-Sleep Mode Clock Gating Control
3
4
DCGCTIMER
Timer Deep-Sleep Mode Clock Gating Control
0x804
-1
read-write
n
0x0
0x0
SYSCTL_DCGCTIMER_D0
Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCTIMER_D1
Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCTIMER_D2
Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCTIMER_D3
Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCTIMER_D4
Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCTIMER_D5
Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
DCGCUART
Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control
0x818
-1
read-write
n
0x0
0x0
SYSCTL_DCGCUART_D0
UART Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCUART_D1
UART Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCUART_D2
UART Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCUART_D3
UART Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCUART_D4
UART Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCUART_D5
UART Module 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCUART_D6
UART Module 6 Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCUART_D7
UART Module 7 Deep-Sleep Mode Clock Gating Control
7
8
DCGCUSB
Universal Serial Bus Deep-Sleep Mode Clock Gating Control
0x828
-1
read-write
n
0x0
0x0
SYSCTL_DCGCUSB_D0
USB Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCWD
Watchdog Timer Deep-Sleep Mode Clock Gating Control
0x800
-1
read-write
n
0x0
0x0
SYSCTL_DCGCWD_D0
Watchdog Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWD_D1
Watchdog Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
DCGCWTIMER
Wide Timer Deep-Sleep Mode Clock Gating Control
0x85C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCWTIMER_D0
Wide Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWTIMER_D1
Wide Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCWTIMER_D2
Wide Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCWTIMER_D3
Wide Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCWTIMER_D4
Wide Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCWTIMER_D5
Wide Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
DID0
Device Identification 0
0x0
-1
read-write
n
0x0
0x0
SYSCTL_DID0_CLASS
Device Class
16
24
SYSCTL_DID0_CLASS_BLIZZARD
Stellaris(R) Blizzard-class microcontrollers
0x5
SYSCTL_DID0_MAJ
Major Revision
8
16
SYSCTL_DID0_MAJ_REVA
Revision A (initial device)
0x0
SYSCTL_DID0_MAJ_REVB
Revision B (first base layer revision)
0x1
SYSCTL_DID0_MAJ_REVC
Revision C (second base layer revision)
0x2
SYSCTL_DID0_MIN
Minor Revision
0
8
SYSCTL_DID0_MIN_0
Initial device, or a major revision update
0x0
SYSCTL_DID0_MIN_1
First metal layer change
0x1
SYSCTL_DID0_MIN_2
Second metal layer change
0x2
SYSCTL_DID0_VER
DID0 Version
28
31
SYSCTL_DID0_VER_1
Second version of the DID0 register format
0x1
DID1
Device Identification 1
0x4
-1
read-write
n
0x0
0x0
SYSCTL_DID1_FAM
Family
24
28
SYSCTL_DID1_FAM_STELLARIS
Stellaris family of microcontollers, that is, all devices with external part numbers starting with LM3S
0x0
SYSCTL_DID1_PINCNT
Package Pin Count
13
16
SYSCTL_DID1_PINCNT_28
28 pin package
0x0
SYSCTL_DID1_PINCNT_48
48-pin package
0x1
SYSCTL_DID1_PINCNT_100
100-pin package
0x2
SYSCTL_DID1_PINCNT_64
64-pin package
0x3
SYSCTL_DID1_PINCNT_144
144-pin package
0x4
SYSCTL_DID1_PINCNT_157
157-pin package
0x5
SYSCTL_DID1_PKG
Package Type
3
5
SYSCTL_DID1_PKG_SOIC
SOIC package
0x0
SYSCTL_DID1_PKG_QFP
LQFP package
0x1
SYSCTL_DID1_PKG_BGA
BGA package
0x2
SYSCTL_DID1_PRTNO
Part Number
16
24
SYSCTL_DID1_PRTNO_LM4F121C4QR
LM4F121C4QR
0x9
SYSCTL_DID1_QUAL
Qualification Status
0
2
SYSCTL_DID1_QUAL_ES
Engineering Sample (unqualified)
0x0
SYSCTL_DID1_QUAL_PP
Pilot Production (unqualified)
0x1
SYSCTL_DID1_QUAL_FQ
Fully Qualified
0x2
SYSCTL_DID1_ROHS
RoHS-Compliance
2
3
SYSCTL_DID1_TEMP
Temperature Range
5
8
SYSCTL_DID1_TEMP_C
Commercial temperature range (0C to 70C)
0x0
SYSCTL_DID1_TEMP_I
Industrial temperature range (-40C to 85C)
0x1
SYSCTL_DID1_TEMP_E
Extended temperature range (-40C to 105C)
0x2
SYSCTL_DID1_VER
DID1 Version
28
32
SYSCTL_DID1_VER_0
Initial DID1 register format definition, indicating a Stellaris LM3Snnn device
0x0
SYSCTL_DID1_VER_1
Second version of the DID1 register format
0x1
DSLPCLKCFG
Deep Sleep Clock Configuration
0x144
-1
read-write
n
0x0
0x0
SYSCTL_DSLPCLKCFG_D
Divider Field Override
23
29
SYSCTL_DSLPCLKCFG_D_1
System clock /1
0x0
SYSCTL_DSLPCLKCFG_D_2
System clock /2
0x1
SYSCTL_DSLPCLKCFG_D_3
System clock /3
0x2
SYSCTL_DSLPCLKCFG_D_4
System clock /4
0x3
SYSCTL_DSLPCLKCFG_D_64
System clock /64
0x3f
SYSCTL_DSLPCLKCFG_O
Clock Source
4
7
SYSCTL_DSLPCLKCFG_O_IGN
MOSC
0x0
SYSCTL_DSLPCLKCFG_O_IO
PIOSC
0x1
SYSCTL_DSLPCLKCFG_O_30
30 kHz
0x3
GPIOHBCTL
GPIO High-Performance Bus Control
0x6C
-1
read-write
n
0x0
0x0
SYSCTL_GPIOHBCTL_PORTA
Port A Advanced High-Performance Bus
0
1
SYSCTL_GPIOHBCTL_PORTB
Port B Advanced High-Performance Bus
1
2
SYSCTL_GPIOHBCTL_PORTC
Port C Advanced High-Performance Bus
2
3
SYSCTL_GPIOHBCTL_PORTD
Port D Advanced High-Performance Bus
3
4
SYSCTL_GPIOHBCTL_PORTE
Port E Advanced High-Performance Bus
4
5
SYSCTL_GPIOHBCTL_PORTF
Port F Advanced High-Performance Bus
5
6
SYSCTL_GPIOHBCTL_PORTG
Port G Advanced High-Performance Bus
6
7
IMC
Interrupt Mask Control
0x54
-1
read-write
n
0x0
0x0
SYSCTL_IMC_BORIM
Brown-Out Reset Interrupt Mask
1
2
SYSCTL_IMC_MOFIM
Main Oscillator Fault Interrupt Mask
3
4
SYSCTL_IMC_MOSCPUPIM
MOSC Power Up Interrupt Mask
8
9
SYSCTL_IMC_PLLLIM
PLL Lock Interrupt Mask
6
7
SYSCTL_IMC_USBPLLLIM
USB PLL Lock Interrupt Mask
7
8
MISC
Masked Interrupt Status and Clear
0x58
-1
read-write
n
0x0
0x0
SYSCTL_MISC_BORMIS
BOR Masked Interrupt Status
1
2
SYSCTL_MISC_MOFMIS
Main Oscillator Fault Masked Interrupt Status
3
4
SYSCTL_MISC_MOSCPUPMIS
MOSC Power Up Masked Interrupt Status
8
9
SYSCTL_MISC_PLLLMIS
PLL Lock Masked Interrupt Status
6
7
SYSCTL_MISC_USBPLLLMIS
USB PLL Lock Masked Interrupt Status
7
8
MOSCCTL
Main Oscillator Control
0x7C
-1
read-write
n
0x0
0x0
SYSCTL_MOSCCTL_CVAL
Clock Validation for MOSC
0
1
SYSCTL_MOSCCTL_MOSCIM
MOSC Failure Action
1
2
SYSCTL_MOSCCTL_NOXTAL
No Crystal Connected
2
3
NVMSTAT
Non-Volatile Memory Information
0x1A0
-1
read-write
n
0x0
0x0
SYSCTL_NVMSTAT_FWB
32 Word Flash Write Buffer Active
0
1
SYSCTL_NVMSTAT_TPSW
Third Party Software Present
4
5
PBORCTL
Brown-Out Reset Control
0x30
-1
read-write
n
0x0
0x0
SYSCTL_PBORCTL_BORIOR
BOR Interrupt or Reset
1
2
PCACMP
Analog Comparator Power Control
0x93C
-1
read-write
n
0x0
0x0
SYSCTL_PCACMP_P0
Analog Comparator Module 0 Power Control
0
1
PCADC
Analog-to-Digital Converter Power Control
0x938
-1
read-write
n
0x0
0x0
SYSCTL_PCADC_P0
ADC Module 0 Power Control
0
1
SYSCTL_PCADC_P1
ADC Module 1 Power Control
1
2
PCCAN
Controller Area Network Power Control
0x934
-1
read-write
n
0x0
0x0
SYSCTL_PCCAN_P0
CAN Module 0 Power Control
0
1
SYSCTL_PCCAN_P1
CAN Module 1 Power Control
1
2
PCDMA
Micro Direct Memory Access Power Control
0x90C
-1
read-write
n
0x0
0x0
SYSCTL_PCDMA_P0
uDMA Module Power Control
0
1
PCEEPROM
EEPROM Power Control
0x958
-1
read-write
n
0x0
0x0
SYSCTL_PCEEPROM_P0
EEPROM Module Power Control
0
1
PCGPIO
General-Purpose Input/Output Power Control
0x908
-1
read-write
n
0x0
0x0
SYSCTL_PCGPIO_P0
GPIO Port A Power Control
0
1
SYSCTL_PCGPIO_P1
GPIO Port B Power Control
1
2
SYSCTL_PCGPIO_P10
GPIO Port L Power Control
10
11
SYSCTL_PCGPIO_P11
GPIO Port M Power Control
11
12
SYSCTL_PCGPIO_P12
GPIO Port N Power Control
12
13
SYSCTL_PCGPIO_P13
GPIO Port P Power Control
13
14
SYSCTL_PCGPIO_P14
GPIO Port Q Power Control
14
15
SYSCTL_PCGPIO_P2
GPIO Port C Power Control
2
3
SYSCTL_PCGPIO_P3
GPIO Port D Power Control
3
4
SYSCTL_PCGPIO_P4
GPIO Port E Power Control
4
5
SYSCTL_PCGPIO_P5
GPIO Port F Power Control
5
6
SYSCTL_PCGPIO_P6
GPIO Port G Power Control
6
7
SYSCTL_PCGPIO_P7
GPIO Port H Power Control
7
8
SYSCTL_PCGPIO_P8
GPIO Port J Power Control
8
9
SYSCTL_PCGPIO_P9
GPIO Port K Power Control
9
10
PCI2C
Inter-Integrated Circuit Power Control
0x920
-1
read-write
n
0x0
0x0
SYSCTL_PCI2C_P0
I2C Module 0 Power Control
0
1
SYSCTL_PCI2C_P1
I2C Module 1 Power Control
1
2
SYSCTL_PCI2C_P2
I2C Module 2 Power Control
2
3
SYSCTL_PCI2C_P3
I2C Module 3 Power Control
3
4
SYSCTL_PCI2C_P4
I2C Module 4 Power Control
4
5
SYSCTL_PCI2C_P5
I2C Module 5 Power Control
5
6
PCSSI
Synchronous Serial Interface Power Control
0x91C
-1
read-write
n
0x0
0x0
SYSCTL_PCSSI_P0
SSI Module 0 Power Control
0
1
SYSCTL_PCSSI_P1
SSI Module 1 Power Control
1
2
SYSCTL_PCSSI_P2
SSI Module 2 Power Control
2
3
SYSCTL_PCSSI_P3
SSI Module 3 Power Control
3
4
PCTIMER
Timer Power Control
0x904
-1
read-write
n
0x0
0x0
SYSCTL_PCTIMER_P0
Timer 0 Power Control
0
1
SYSCTL_PCTIMER_P1
Timer 1 Power Control
1
2
SYSCTL_PCTIMER_P2
Timer 2 Power Control
2
3
SYSCTL_PCTIMER_P3
Timer 3 Power Control
3
4
SYSCTL_PCTIMER_P4
Timer 4 Power Control
4
5
SYSCTL_PCTIMER_P5
Timer 5 Power Control
5
6
PCUART
Universal Asynchronous Receiver/Transmitter Power Control
0x918
-1
read-write
n
0x0
0x0
SYSCTL_PCUART_P0
UART Module 0 Power Control
0
1
SYSCTL_PCUART_P1
UART Module 1 Power Control
1
2
SYSCTL_PCUART_P2
UART Module 2 Power Control
2
3
SYSCTL_PCUART_P3
UART Module 3 Power Control
3
4
SYSCTL_PCUART_P4
UART Module 4 Power Control
4
5
SYSCTL_PCUART_P5
UART Module 5 Power Control
5
6
SYSCTL_PCUART_P6
UART Module 6 Power Control
6
7
SYSCTL_PCUART_P7
UART Module 7 Power Control
7
8
PCUSB
Universal Serial Bus Power Control
0x928
-1
read-write
n
0x0
0x0
SYSCTL_PCUSB_P0
USB Module Power Control
0
1
PCWD
Watchdog Timer Power Control
0x900
-1
read-write
n
0x0
0x0
SYSCTL_PCWD_P0
Watchdog Timer 0 Power Control
0
1
SYSCTL_PCWD_P1
Watchdog Timer 1 Power Control
1
2
PCWTIMER
Wide Timer Power Control
0x95C
-1
read-write
n
0x0
0x0
SYSCTL_PCWTIMER_P0
Wide Timer 0 Power Control
0
1
SYSCTL_PCWTIMER_P1
Wide Timer 1 Power Control
1
2
SYSCTL_PCWTIMER_P2
Wide Timer 2 Power Control
2
3
SYSCTL_PCWTIMER_P3
Wide Timer 3 Power Control
3
4
SYSCTL_PCWTIMER_P4
Wide Timer 4 Power Control
4
5
SYSCTL_PCWTIMER_P5
Wide Timer 5 Power Control
5
6
PIOSCCAL
Precision Internal Oscillator Calibration
0x150
-1
read-write
n
0x0
0x0
SYSCTL_PIOSCCAL_UPDATE
Update Trim
8
9
SYSCTL_PIOSCCAL_UT
User Trim Value
0
7
SYSCTL_PIOSCCAL_UTEN
Use User Trim Value
31
32
PLLFREQ0
PLL Frequency 0
0x160
-1
read-write
n
0x0
0x0
SYSCTL_PLLFREQ0_MFRAC
PLL M Fractional Value
10
20
SYSCTL_PLLFREQ0_MINT
PLL M Integer Value
0
10
PLLFREQ1
PLL Frequency
0x164
-1
read-write
n
0x0
0x0
SYSCTL_PLLFREQ1_N
PLL N Value
0
5
SYSCTL_PLLFREQ1_Q
PLL Q Value
8
13
PLLSTAT
PLL Status
0x168
-1
read-write
n
0x0
0x0
SYSCTL_PLLSTAT_LOCK
PLL Lock
0
1
PPACMP
Analog Comparator Peripheral Present
0x33C
-1
read-write
n
0x0
0x0
SYSCTL_PPACMP_P0
Analog Comparator Module Present
0
1
PPADC
Analog-to-Digital Converter Peripheral Present
0x338
-1
read-write
n
0x0
0x0
SYSCTL_PPADC_P0
ADC Module 0 Present
0
1
SYSCTL_PPADC_P1
ADC Module 1 Present
1
2
PPCAN
Controller Area Network Peripheral Present
0x334
-1
read-write
n
0x0
0x0
SYSCTL_PPCAN_P0
CAN Module 0 Present
0
1
SYSCTL_PPCAN_P1
CAN Module 1 Present
1
2
PPDMA
Micro Direct Memory Access Peripheral Present
0x30C
-1
read-write
n
0x0
0x0
SYSCTL_PPDMA_P0
uDMA Module Present
0
1
PPEEPROM
EEPROM Peripheral Present
0x358
-1
read-write
n
0x0
0x0
SYSCTL_PPEEPROM_P0
EEPROM Module Present
0
1
PPEPI
External Peripheral Interface Peripheral Present
0x310
-1
read-write
n
0x0
0x0
SYSCTL_PPEPI_P0
EPI Module Present
0
1
PPETH
Ethernet MAC Peripheral Present
0x32C
-1
read-write
n
0x0
0x0
SYSCTL_PPETH_P0
Ethernet MAC Module Present
0
1
PPETHPHY
Ethernet PHY Peripheral Present
0x330
-1
read-write
n
0x0
0x0
SYSCTL_PPETHPHY_P0
Ethernet PHY Module Present
0
1
PPGPIO
General-Purpose Input/Output Peripheral Present
0x308
-1
read-write
n
0x0
0x0
SYSCTL_PPGPIO_P0
GPIO Port A Present
0
1
SYSCTL_PPGPIO_P1
GPIO Port B Present
1
2
SYSCTL_PPGPIO_P10
GPIO Port L Present
10
11
SYSCTL_PPGPIO_P11
GPIO Port M Present
11
12
SYSCTL_PPGPIO_P12
GPIO Port N Present
12
13
SYSCTL_PPGPIO_P13
GPIO Port P Present
13
14
SYSCTL_PPGPIO_P14
GPIO Port Q Present
14
15
SYSCTL_PPGPIO_P2
GPIO Port C Present
2
3
SYSCTL_PPGPIO_P3
GPIO Port D Present
3
4
SYSCTL_PPGPIO_P4
GPIO Port E Present
4
5
SYSCTL_PPGPIO_P5
GPIO Port F Present
5
6
SYSCTL_PPGPIO_P6
GPIO Port G Present
6
7
SYSCTL_PPGPIO_P7
GPIO Port H Present
7
8
SYSCTL_PPGPIO_P8
GPIO Port J Present
8
9
SYSCTL_PPGPIO_P9
GPIO Port K Present
9
10
PPHIB
Hibernation Peripheral Present
0x314
-1
read-write
n
0x0
0x0
SYSCTL_PPHIB_P0
Hibernation Module Present
0
1
PPI2C
Inter-Integrated Circuit Peripheral Present
0x320
-1
read-write
n
0x0
0x0
SYSCTL_PPI2C_P0
I2C Module 0 Present
0
1
SYSCTL_PPI2C_P1
I2C Module 1 Present
1
2
SYSCTL_PPI2C_P2
I2C Module 2 Present
2
3
SYSCTL_PPI2C_P3
I2C Module 3 Present
3
4
SYSCTL_PPI2C_P4
I2C Module 4 Present
4
5
SYSCTL_PPI2C_P5
I2C Module 5 Present
5
6
PPI2S
Inter-Integrated Circuit Sound Peripheral Present
0x324
-1
read-write
n
0x0
0x0
SYSCTL_PPI2S_P0
I2S Module Present
0
1
PPPWM
Pulse Width Modulator Peripheral Present
0x340
-1
read-write
n
0x0
0x0
SYSCTL_PPPWM_P0
PWM Module 0 Present
0
1
SYSCTL_PPPWM_P1
PWM Module 1 Present
1
2
PPQEI
Quadrature Encoder Interface Peripheral Present
0x344
-1
read-write
n
0x0
0x0
SYSCTL_PPQEI_P0
QEI Module 0 Present
0
1
SYSCTL_PPQEI_P1
QEI Module 1 Present
1
2
PPSSI
Synchronous Serial Interface Peripheral Present
0x31C
-1
read-write
n
0x0
0x0
SYSCTL_PPSSI_P0
SSI Module 0 Present
0
1
SYSCTL_PPSSI_P1
SSI Module 1 Present
1
2
SYSCTL_PPSSI_P2
SSI Module 2 Present
2
3
SYSCTL_PPSSI_P3
SSI Module 3 Present
3
4
PPTIMER
Timer Peripheral Present
0x304
-1
read-write
n
0x0
0x0
SYSCTL_PPTIMER_P0
Timer 0 Present
0
1
SYSCTL_PPTIMER_P1
Timer 1 Present
1
2
SYSCTL_PPTIMER_P2
Timer 2 Present
2
3
SYSCTL_PPTIMER_P3
Timer 3 Present
3
4
SYSCTL_PPTIMER_P4
Timer 4 Present
4
5
SYSCTL_PPTIMER_P5
Timer 5 Present
5
6
PPUART
Universal Asynchronous Receiver/Transmitter Peripheral Present
0x318
-1
read-write
n
0x0
0x0
SYSCTL_PPUART_P0
UART Module 0 Present
0
1
SYSCTL_PPUART_P1
UART Module 1 Present
1
2
SYSCTL_PPUART_P2
UART Module 2 Present
2
3
SYSCTL_PPUART_P3
UART Module 3 Present
3
4
SYSCTL_PPUART_P4
UART Module 4 Present
4
5
SYSCTL_PPUART_P5
UART Module 5 Present
5
6
SYSCTL_PPUART_P6
UART Module 6 Present
6
7
SYSCTL_PPUART_P7
UART Module 7 Present
7
8
PPUSB
Universal Serial Bus Peripheral Present
0x328
-1
read-write
n
0x0
0x0
SYSCTL_PPUSB_P0
USB Module Present
0
1
PPWD
Watchdog Timer Peripheral Present
0x300
-1
read-write
n
0x0
0x0
SYSCTL_PPWD_P0
Watchdog Timer 0 Present
0
1
SYSCTL_PPWD_P1
Watchdog Timer 1 Present
1
2
PPWTIMER
Wide Timer Peripheral Present
0x35C
-1
read-write
n
0x0
0x0
SYSCTL_PPWTIMER_P0
Wide Timer 0 Present
0
1
SYSCTL_PPWTIMER_P1
Wide Timer 1 Present
1
2
SYSCTL_PPWTIMER_P2
Wide Timer 2 Present
2
3
SYSCTL_PPWTIMER_P3
Wide Timer 3 Present
3
4
SYSCTL_PPWTIMER_P4
Wide Timer 4 Present
4
5
SYSCTL_PPWTIMER_P5
Wide Timer 5 Present
5
6
PRACMP
Analog Comparator Peripheral Ready
0xA3C
-1
read-write
n
0x0
0x0
SYSCTL_PRACMP_R0
Analog Comparator Module Peripheral Ready
0
1
PRADC
Analog-to-Digital Converter Peripheral Ready
0xA38
-1
read-write
n
0x0
0x0
SYSCTL_PRADC_R0
ADC Module 0 Peripheral Ready
0
1
SYSCTL_PRADC_R1
ADC Module 1 Peripheral Ready
1
2
PRCAN
Controller Area Network Peripheral Ready
0xA34
-1
read-write
n
0x0
0x0
SYSCTL_PRCAN_R0
CAN Module 0 Peripheral Ready
0
1
SYSCTL_PRCAN_R1
CAN Module 1 Peripheral Ready
1
2
PRDMA
Micro Direct Memory Access Peripheral Ready
0xA0C
-1
read-write
n
0x0
0x0
SYSCTL_PRDMA_R0
uDMA Module Peripheral Ready
0
1
PREEPROM
EEPROM Peripheral Ready
0xA58
-1
read-write
n
0x0
0x0
SYSCTL_PREEPROM_R0
EEPROM Module Peripheral Ready
0
1
PRGPIO
General-Purpose Input/Output Peripheral Ready
0xA08
-1
read-write
n
0x0
0x0
SYSCTL_PRGPIO_R0
GPIO Port A Peripheral Ready
0
1
SYSCTL_PRGPIO_R1
GPIO Port B Peripheral Ready
1
2
SYSCTL_PRGPIO_R10
GPIO Port L Peripheral Ready
10
11
SYSCTL_PRGPIO_R11
GPIO Port M Peripheral Ready
11
12
SYSCTL_PRGPIO_R12
GPIO Port N Peripheral Ready
12
13
SYSCTL_PRGPIO_R13
GPIO Port P Peripheral Ready
13
14
SYSCTL_PRGPIO_R14
GPIO Port Q Peripheral Ready
14
15
SYSCTL_PRGPIO_R2
GPIO Port C Peripheral Ready
2
3
SYSCTL_PRGPIO_R3
GPIO Port D Peripheral Ready
3
4
SYSCTL_PRGPIO_R4
GPIO Port E Peripheral Ready
4
5
SYSCTL_PRGPIO_R5
GPIO Port F Peripheral Ready
5
6
SYSCTL_PRGPIO_R6
GPIO Port G Peripheral Ready
6
7
SYSCTL_PRGPIO_R7
GPIO Port H Peripheral Ready
7
8
SYSCTL_PRGPIO_R8
GPIO Port J Peripheral Ready
8
9
SYSCTL_PRGPIO_R9
GPIO Port K Peripheral Ready
9
10
PRI2C
Inter-Integrated Circuit Peripheral Ready
0xA20
-1
read-write
n
0x0
0x0
SYSCTL_PRI2C_R0
I2C Module 0 Peripheral Ready
0
1
SYSCTL_PRI2C_R1
I2C Module 1 Peripheral Ready
1
2
SYSCTL_PRI2C_R2
I2C Module 2 Peripheral Ready
2
3
SYSCTL_PRI2C_R3
I2C Module 3 Peripheral Ready
3
4
SYSCTL_PRI2C_R4
I2C Module 4 Peripheral Ready
4
5
SYSCTL_PRI2C_R5
I2C Module 5 Peripheral Ready
5
6
PRSSI
Synchronous Serial Interface Peripheral Ready
0xA1C
-1
read-write
n
0x0
0x0
SYSCTL_PRSSI_R0
SSI Module 0 Peripheral Ready
0
1
SYSCTL_PRSSI_R1
SSI Module 1 Peripheral Ready
1
2
SYSCTL_PRSSI_R2
SSI Module 2 Peripheral Ready
2
3
SYSCTL_PRSSI_R3
SSI Module 3 Peripheral Ready
3
4
PRTIMER
Timer Peripheral Ready
0xA04
-1
read-write
n
0x0
0x0
SYSCTL_PRTIMER_R0
Timer 0 Peripheral Ready
0
1
SYSCTL_PRTIMER_R1
Timer 1 Peripheral Ready
1
2
SYSCTL_PRTIMER_R2
Timer 2 Peripheral Ready
2
3
SYSCTL_PRTIMER_R3
Timer 3 Peripheral Ready
3
4
SYSCTL_PRTIMER_R4
Timer 4 Peripheral Ready
4
5
SYSCTL_PRTIMER_R5
Timer 5 Peripheral Ready
5
6
PRUART
Universal Asynchronous Receiver/Transmitter Peripheral Ready
0xA18
-1
read-write
n
0x0
0x0
SYSCTL_PRUART_R0
UART Module 0 Peripheral Ready
0
1
SYSCTL_PRUART_R1
UART Module 1 Peripheral Ready
1
2
SYSCTL_PRUART_R2
UART Module 2 Peripheral Ready
2
3
SYSCTL_PRUART_R3
UART Module 3 Peripheral Ready
3
4
SYSCTL_PRUART_R4
UART Module 4 Peripheral Ready
4
5
SYSCTL_PRUART_R5
UART Module 5 Peripheral Ready
5
6
SYSCTL_PRUART_R6
UART Module 6 Peripheral Ready
6
7
SYSCTL_PRUART_R7
UART Module 7 Peripheral Ready
7
8
PRUSB
Universal Serial Bus Peripheral Ready
0xA28
-1
read-write
n
0x0
0x0
SYSCTL_PRUSB_R0
USB Module Peripheral Ready
0
1
PRWD
Watchdog Timer Peripheral Ready
0xA00
-1
read-write
n
0x0
0x0
SYSCTL_PRWD_R0
Watchdog Timer 0 Peripheral Ready
0
1
SYSCTL_PRWD_R1
Watchdog Timer 1 Peripheral Ready
1
2
PRWTIMER
Wide Timer Peripheral Ready
0xA5C
-1
read-write
n
0x0
0x0
SYSCTL_PRWTIMER_R0
Wide Timer 0 Peripheral Ready
0
1
SYSCTL_PRWTIMER_R1
Wide Timer 1 Peripheral Ready
1
2
SYSCTL_PRWTIMER_R2
Wide Timer 2 Peripheral Ready
2
3
SYSCTL_PRWTIMER_R3
Wide Timer 3 Peripheral Ready
3
4
SYSCTL_PRWTIMER_R4
Wide Timer 4 Peripheral Ready
4
5
SYSCTL_PRWTIMER_R5
Wide Timer 5 Peripheral Ready
5
6
RCC
Run-Mode Clock Configuration
0x60
-1
read-write
n
0x0
0x0
SYSCTL_RCC_ACG
Auto Clock Gating
27
28
SYSCTL_RCC_BYPASS
PLL Bypass
11
12
SYSCTL_RCC_IOSCDIS
Internal Oscillator Disable
1
2
SYSCTL_RCC_MOSCDIS
Main Oscillator Disable
0
1
SYSCTL_RCC_OSCSRC
Oscillator Source
4
6
SYSCTL_RCC_OSCSRC_MAIN
MOSC
0x0
SYSCTL_RCC_OSCSRC_INT
IOSC
0x1
SYSCTL_RCC_OSCSRC_INT4
IOSC/4
0x2
SYSCTL_RCC_OSCSRC_30
30 kHz
0x3
SYSCTL_RCC_PWRDN
PLL Power Down
13
14
SYSCTL_RCC_SYSDIV
System Clock Divisor
23
27
SYSCTL_RCC_USESYSDIV
Enable System Clock Divider
22
23
SYSCTL_RCC_XTAL
Crystal Value
6
11
SYSCTL_RCC_XTAL_10MHZ
10 MHz
0x10
SYSCTL_RCC_XTAL_12MHZ
12 MHz
0x11
SYSCTL_RCC_XTAL_12_2MHZ
12.288 MHz
0x12
SYSCTL_RCC_XTAL_13_5MHZ
13.56 MHz
0x13
SYSCTL_RCC_XTAL_14_3MHZ
14.31818 MHz
0x14
SYSCTL_RCC_XTAL_16MHZ
16 MHz
0x15
SYSCTL_RCC_XTAL_16_3MHZ
16.384 MHz
0x16
SYSCTL_RCC_XTAL_18MHZ
18.0 MHz
0x17
SYSCTL_RCC_XTAL_20MHZ
20.0 MHz
0x18
SYSCTL_RCC_XTAL_24MHZ
24.0 MHz
0x19
SYSCTL_RCC_XTAL_25MHZ
25.0 MHz
0x1a
SYSCTL_RCC_XTAL_4MHZ
4 MHz
0x6
SYSCTL_RCC_XTAL_4_09MHZ
4.096 MHz
0x7
SYSCTL_RCC_XTAL_4_91MHZ
4.9152 MHz
0x8
SYSCTL_RCC_XTAL_5MHZ
5 MHz
0x9
SYSCTL_RCC_XTAL_5_12MHZ
5.12 MHz
0xa
SYSCTL_RCC_XTAL_6MHZ
6 MHz
0xb
SYSCTL_RCC_XTAL_6_14MHZ
6.144 MHz
0xc
SYSCTL_RCC_XTAL_7_37MHZ
7.3728 MHz
0xd
SYSCTL_RCC_XTAL_8MHZ
8 MHz
0xe
SYSCTL_RCC_XTAL_8_19MHZ
8.192 MHz
0xf
RCC2
Run-Mode Clock Configuration 2
0x70
-1
read-write
n
0x0
0x0
SYSCTL_RCC2_BYPASS2
PLL Bypass 2
11
12
SYSCTL_RCC2_DIV400
Divide PLL as 400 MHz vs. 200 MHz
30
31
SYSCTL_RCC2_OSCSRC2
Oscillator Source 2
4
7
SYSCTL_RCC2_OSCSRC2_MO
MOSC
0x0
SYSCTL_RCC2_OSCSRC2_IO
PIOSC
0x1
SYSCTL_RCC2_OSCSRC2_IO4
PIOSC/4
0x2
SYSCTL_RCC2_OSCSRC2_30
30 kHz
0x3
SYSCTL_RCC2_PWRDN2
Power-Down PLL 2
13
14
SYSCTL_RCC2_SYSDIV2
System Clock Divisor 2
23
29
SYSCTL_RCC2_SYSDIV2_2
System clock /2
0x1
SYSCTL_RCC2_SYSDIV2_17
System clock /17
0x10
SYSCTL_RCC2_SYSDIV2_18
System clock /18
0x11
SYSCTL_RCC2_SYSDIV2_19
System clock /19
0x12
SYSCTL_RCC2_SYSDIV2_20
System clock /20
0x13
SYSCTL_RCC2_SYSDIV2_21
System clock /21
0x14
SYSCTL_RCC2_SYSDIV2_22
System clock /22
0x15
SYSCTL_RCC2_SYSDIV2_23
System clock /23
0x16
SYSCTL_RCC2_SYSDIV2_24
System clock /24
0x17
SYSCTL_RCC2_SYSDIV2_25
System clock /25
0x18
SYSCTL_RCC2_SYSDIV2_26
System clock /26
0x19
SYSCTL_RCC2_SYSDIV2_27
System clock /27
0x1a
SYSCTL_RCC2_SYSDIV2_28
System clock /28
0x1b
SYSCTL_RCC2_SYSDIV2_29
System clock /29
0x1c
SYSCTL_RCC2_SYSDIV2_30
System clock /30
0x1d
SYSCTL_RCC2_SYSDIV2_31
System clock /31
0x1e
SYSCTL_RCC2_SYSDIV2_32
System clock /32
0x1f
SYSCTL_RCC2_SYSDIV2_3
System clock /3
0x2
SYSCTL_RCC2_SYSDIV2_33
System clock /33
0x20
SYSCTL_RCC2_SYSDIV2_34
System clock /34
0x21
SYSCTL_RCC2_SYSDIV2_35
System clock /35
0x22
SYSCTL_RCC2_SYSDIV2_36
System clock /36
0x23
SYSCTL_RCC2_SYSDIV2_37
System clock /37
0x24
SYSCTL_RCC2_SYSDIV2_38
System clock /38
0x25
SYSCTL_RCC2_SYSDIV2_39
System clock /39
0x26
SYSCTL_RCC2_SYSDIV2_40
System clock /40
0x27
SYSCTL_RCC2_SYSDIV2_41
System clock /41
0x28
SYSCTL_RCC2_SYSDIV2_42
System clock /42
0x29
SYSCTL_RCC2_SYSDIV2_43
System clock /43
0x2a
SYSCTL_RCC2_SYSDIV2_44
System clock /44
0x2b
SYSCTL_RCC2_SYSDIV2_45
System clock /45
0x2c
SYSCTL_RCC2_SYSDIV2_46
System clock /46
0x2d
SYSCTL_RCC2_SYSDIV2_47
System clock /47
0x2e
SYSCTL_RCC2_SYSDIV2_48
System clock /48
0x2f
SYSCTL_RCC2_SYSDIV2_4
System clock /4
0x3
SYSCTL_RCC2_SYSDIV2_49
System clock /49
0x30
SYSCTL_RCC2_SYSDIV2_50
System clock /50
0x31
SYSCTL_RCC2_SYSDIV2_51
System clock /51
0x32
SYSCTL_RCC2_SYSDIV2_52
System clock /52
0x33
SYSCTL_RCC2_SYSDIV2_53
System clock /53
0x34
SYSCTL_RCC2_SYSDIV2_54
System clock /54
0x35
SYSCTL_RCC2_SYSDIV2_55
System clock /55
0x36
SYSCTL_RCC2_SYSDIV2_56
System clock /56
0x37
SYSCTL_RCC2_SYSDIV2_57
System clock /57
0x38
SYSCTL_RCC2_SYSDIV2_58
System clock /58
0x39
SYSCTL_RCC2_SYSDIV2_59
System clock /59
0x3a
SYSCTL_RCC2_SYSDIV2_60
System clock /60
0x3b
SYSCTL_RCC2_SYSDIV2_61
System clock /61
0x3c
SYSCTL_RCC2_SYSDIV2_62
System clock /62
0x3d
SYSCTL_RCC2_SYSDIV2_63
System clock /63
0x3e
SYSCTL_RCC2_SYSDIV2_64
System clock /64
0x3f
SYSCTL_RCC2_SYSDIV2_5
System clock /5
0x4
SYSCTL_RCC2_SYSDIV2_6
System clock /6
0x5
SYSCTL_RCC2_SYSDIV2_7
System clock /7
0x6
SYSCTL_RCC2_SYSDIV2_8
System clock /8
0x7
SYSCTL_RCC2_SYSDIV2_9
System clock /9
0x8
SYSCTL_RCC2_SYSDIV2_10
System clock /10
0x9
SYSCTL_RCC2_SYSDIV2_11
System clock /11
0xa
SYSCTL_RCC2_SYSDIV2_12
System clock /12
0xb
SYSCTL_RCC2_SYSDIV2_13
System clock /13
0xc
SYSCTL_RCC2_SYSDIV2_14
System clock /14
0xd
SYSCTL_RCC2_SYSDIV2_15
System clock /15
0xe
SYSCTL_RCC2_SYSDIV2_16
System clock /16
0xf
SYSCTL_RCC2_SYSDIV2LSB
Additional LSB for SYSDIV2
22
23
SYSCTL_RCC2_USBPWRDN
Power-Down USB PLL
14
15
SYSCTL_RCC2_USERCC2
Use RCC2
31
32
RCGC0
Run Mode Clock Gating Control Register 0
0x100
-1
read-write
n
0x0
0x0
SYSCTL_RCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_RCGC0_ADC0SPD
ADC0 Sample Speed
8
10
SYSCTL_RCGC0_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_RCGC0_ADC1SPD
ADC1 Sample Speed
10
12
SYSCTL_RCGC0_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_RCGC0_CAN1
CAN1 Clock Gating Control
25
26
SYSCTL_RCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_RCGC0_PWM0
PWM Clock Gating Control
20
21
SYSCTL_RCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_RCGC0_WDT1
WDT1 Clock Gating Control
28
29
RCGC1
Run Mode Clock Gating Control Register 1
0x104
-1
read-write
n
0x0
0x0
SYSCTL_RCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_RCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_RCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_RCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_RCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_RCGC1_QEI0
QEI0 Clock Gating Control
8
9
SYSCTL_RCGC1_QEI1
QEI1 Clock Gating Control
9
10
SYSCTL_RCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_RCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_RCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_RCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_RCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_RCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_RCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_RCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_RCGC1_UART2
UART2 Clock Gating Control
2
3
RCGC2
Run Mode Clock Gating Control Register 2
0x108
-1
read-write
n
0x0
0x0
SYSCTL_RCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_RCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_RCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_RCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_RCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_RCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_RCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_RCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_RCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_RCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTL_RCGC2_USB0
USB0 Clock Gating Control
16
17
RCGCACMP
Analog Comparator Run Mode Clock Gating Control
0x63C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCACMP_R0
Analog Comparator Module Run Mode Clock Gating Control
0
1
RCGCADC
Analog-to-Digital Converter Run Mode Clock Gating Control
0x638
-1
read-write
n
0x0
0x0
SYSCTL_RCGCADC_R0
ADC Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCADC_R1
ADC Module 1 Run Mode Clock Gating Control
1
2
RCGCCAN
Controller Area Network Run Mode Clock Gating Control
0x634
-1
read-write
n
0x0
0x0
SYSCTL_RCGCCAN_R0
CAN Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCCAN_R1
CAN Module 1 Run Mode Clock Gating Control
1
2
RCGCDMA
Micro Direct Memory Access Run Mode Clock Gating Control
0x60C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCDMA_R0
uDMA Module Run Mode Clock Gating Control
0
1
RCGCEEPROM
EEPROM Run Mode Clock Gating Control
0x658
-1
read-write
n
0x0
0x0
SYSCTL_RCGCEEPROM_R0
EEPROM Module Run Mode Clock Gating Control
0
1
RCGCGPIO
General-Purpose Input/Output Run Mode Clock Gating Control
0x608
-1
read-write
n
0x0
0x0
SYSCTL_RCGCGPIO_R0
GPIO Port A Run Mode Clock Gating Control
0
1
SYSCTL_RCGCGPIO_R1
GPIO Port B Run Mode Clock Gating Control
1
2
SYSCTL_RCGCGPIO_R10
GPIO Port L Run Mode Clock Gating Control
10
11
SYSCTL_RCGCGPIO_R11
GPIO Port M Run Mode Clock Gating Control
11
12
SYSCTL_RCGCGPIO_R12
GPIO Port N Run Mode Clock Gating Control
12
13
SYSCTL_RCGCGPIO_R13
GPIO Port P Run Mode Clock Gating Control
13
14
SYSCTL_RCGCGPIO_R14
GPIO Port Q Run Mode Clock Gating Control
14
15
SYSCTL_RCGCGPIO_R2
GPIO Port C Run Mode Clock Gating Control
2
3
SYSCTL_RCGCGPIO_R3
GPIO Port D Run Mode Clock Gating Control
3
4
SYSCTL_RCGCGPIO_R4
GPIO Port E Run Mode Clock Gating Control
4
5
SYSCTL_RCGCGPIO_R5
GPIO Port F Run Mode Clock Gating Control
5
6
SYSCTL_RCGCGPIO_R6
GPIO Port G Run Mode Clock Gating Control
6
7
SYSCTL_RCGCGPIO_R7
GPIO Port H Run Mode Clock Gating Control
7
8
SYSCTL_RCGCGPIO_R8
GPIO Port J Run Mode Clock Gating Control
8
9
SYSCTL_RCGCGPIO_R9
GPIO Port K Run Mode Clock Gating Control
9
10
RCGCI2C
Inter-Integrated Circuit Run Mode Clock Gating Control
0x620
-1
read-write
n
0x0
0x0
SYSCTL_RCGCI2C_R0
I2C Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCI2C_R1
I2C Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCI2C_R2
I2C Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCI2C_R3
I2C Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCI2C_R4
I2C Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCI2C_R5
I2C Module 5 Run Mode Clock Gating Control
5
6
RCGCSSI
Synchronous Serial Interface Run Mode Clock Gating Control
0x61C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCSSI_R0
SSI Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCSSI_R1
SSI Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCSSI_R2
SSI Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCSSI_R3
SSI Module 3 Run Mode Clock Gating Control
3
4
RCGCTIMER
Timer Run Mode Clock Gating Control
0x604
-1
read-write
n
0x0
0x0
SYSCTL_RCGCTIMER_R0
Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCTIMER_R1
Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCTIMER_R2
Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCTIMER_R3
Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCTIMER_R4
Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCTIMER_R5
Timer 5 Run Mode Clock Gating Control
5
6
RCGCUART
Universal Asynchronous Receiver/Transmitter Run Mode Clock Gating Control
0x618
-1
read-write
n
0x0
0x0
SYSCTL_RCGCUART_R0
UART Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCUART_R1
UART Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCUART_R2
UART Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCUART_R3
UART Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCUART_R4
UART Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCUART_R5
UART Module 5 Run Mode Clock Gating Control
5
6
SYSCTL_RCGCUART_R6
UART Module 6 Run Mode Clock Gating Control
6
7
SYSCTL_RCGCUART_R7
UART Module 7 Run Mode Clock Gating Control
7
8
RCGCUSB
Universal Serial Bus Run Mode Clock Gating Control
0x628
-1
read-write
n
0x0
0x0
SYSCTL_RCGCUSB_R0
USB Module Run Mode Clock Gating Control
0
1
RCGCWD
Watchdog Timer Run Mode Clock Gating Control
0x600
-1
read-write
n
0x0
0x0
SYSCTL_RCGCWD_R0
Watchdog Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWD_R1
Watchdog Timer 1 Run Mode Clock Gating Control
1
2
RCGCWTIMER
Wide Timer Run Mode Clock Gating Control
0x65C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCWTIMER_R0
Wide Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWTIMER_R1
Wide Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCWTIMER_R2
Wide Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCWTIMER_R3
Wide Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCWTIMER_R4
Wide Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCWTIMER_R5
Wide Timer 5 Run Mode Clock Gating Control
5
6
RESC
Reset Cause
0x5C
-1
read-write
n
0x0
0x0
SYSCTL_RESC_BOR
Brown-Out Reset
2
3
SYSCTL_RESC_EXT
External Reset
0
1
SYSCTL_RESC_MOSCFAIL
MOSC Failure Reset
16
17
SYSCTL_RESC_POR
Power-On Reset
1
2
SYSCTL_RESC_SW
Software Reset
4
5
SYSCTL_RESC_WDT0
Watchdog Timer 0 Reset
3
4
SYSCTL_RESC_WDT1
Watchdog Timer 1 Reset
5
6
RIS
Raw Interrupt Status
0x50
-1
read-write
n
0x0
0x0
SYSCTL_RIS_BORRIS
Brown-Out Reset Raw Interrupt Status
1
2
SYSCTL_RIS_MOFRIS
Main Oscillator Fault Raw Interrupt Status
3
4
SYSCTL_RIS_MOSCPUPRIS
MOSC Power Up Raw Interrupt Status
8
9
SYSCTL_RIS_PLLLRIS
PLL Lock Raw Interrupt Status
6
7
SYSCTL_RIS_USBPLLLRIS
USB PLL Lock Raw Interrupt Status
7
8
SCGC0
Sleep Mode Clock Gating Control Register 0
0x110
-1
read-write
n
0x0
0x0
SYSCTL_SCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_SCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_SCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_SCGC0_CAN1
CAN1 Clock Gating Control
25
26
SYSCTL_SCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_SCGC0_PWM0
PWM Clock Gating Control
20
21
SYSCTL_SCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_SCGC0_WDT1
WDT1 Clock Gating Control
28
29
SCGC1
Sleep Mode Clock Gating Control Register 1
0x114
-1
read-write
n
0x0
0x0
SYSCTL_SCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_SCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_SCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_SCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_SCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_SCGC1_QEI0
QEI0 Clock Gating Control
8
9
SYSCTL_SCGC1_QEI1
QEI1 Clock Gating Control
9
10
SYSCTL_SCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_SCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_SCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_SCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_SCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_SCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_SCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_SCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_SCGC1_UART2
UART2 Clock Gating Control
2
3
SCGC2
Sleep Mode Clock Gating Control Register 2
0x118
-1
read-write
n
0x0
0x0
SYSCTL_SCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_SCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_SCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_SCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_SCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_SCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_SCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_SCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_SCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_SCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTL_SCGC2_USB0
USB0 Clock Gating Control
16
17
SCGCACMP
Analog Comparator Sleep Mode Clock Gating Control
0x73C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCACMP_S0
Analog Comparator Module Sleep Mode Clock Gating Control
0
1
SCGCADC
Analog-to-Digital Converter Sleep Mode Clock Gating Control
0x738
-1
read-write
n
0x0
0x0
SYSCTL_SCGCADC_S0
ADC Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCADC_S1
ADC Module 1 Sleep Mode Clock Gating Control
1
2
SCGCCAN
Controller Area Network Sleep Mode Clock Gating Control
0x734
-1
read-write
n
0x0
0x0
SYSCTL_SCGCCAN_S0
CAN Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCCAN_S1
CAN Module 1 Sleep Mode Clock Gating Control
1
2
SCGCDMA
Micro Direct Memory Access Sleep Mode Clock Gating Control
0x70C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCDMA_S0
uDMA Module Sleep Mode Clock Gating Control
0
1
SCGCEEPROM
EEPROM Sleep Mode Clock Gating Control
0x758
-1
read-write
n
0x0
0x0
SYSCTL_SCGCEEPROM_S0
EEPROM Module Sleep Mode Clock Gating Control
0
1
SCGCGPIO
General-Purpose Input/Output Sleep Mode Clock Gating Control
0x708
-1
read-write
n
0x0
0x0
SYSCTL_SCGCGPIO_S0
GPIO Port A Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCGPIO_S1
GPIO Port B Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCGPIO_S10
GPIO Port L Sleep Mode Clock Gating Control
10
11
SYSCTL_SCGCGPIO_S11
GPIO Port M Sleep Mode Clock Gating Control
11
12
SYSCTL_SCGCGPIO_S12
GPIO Port N Sleep Mode Clock Gating Control
12
13
SYSCTL_SCGCGPIO_S13
GPIO Port P Sleep Mode Clock Gating Control
13
14
SYSCTL_SCGCGPIO_S14
GPIO Port Q Sleep Mode Clock Gating Control
14
15
SYSCTL_SCGCGPIO_S2
GPIO Port C Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCGPIO_S3
GPIO Port D Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCGPIO_S4
GPIO Port E Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCGPIO_S5
GPIO Port F Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCGPIO_S6
GPIO Port G Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCGPIO_S7
GPIO Port H Sleep Mode Clock Gating Control
7
8
SYSCTL_SCGCGPIO_S8
GPIO Port J Sleep Mode Clock Gating Control
8
9
SYSCTL_SCGCGPIO_S9
GPIO Port K Sleep Mode Clock Gating Control
9
10
SCGCI2C
Inter-Integrated Circuit Sleep Mode Clock Gating Control
0x720
-1
read-write
n
0x0
0x0
SYSCTL_SCGCI2C_S0
I2C Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCI2C_S1
I2C Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCI2C_S2
I2C Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCI2C_S3
I2C Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCI2C_S4
I2C Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCI2C_S5
I2C Module 5 Sleep Mode Clock Gating Control
5
6
SCGCSSI
Synchronous Serial Interface Sleep Mode Clock Gating Control
0x71C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCSSI_S0
SSI Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCSSI_S1
SSI Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCSSI_S2
SSI Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCSSI_S3
SSI Module 3 Sleep Mode Clock Gating Control
3
4
SCGCTIMER
Timer Sleep Mode Clock Gating Control
0x704
-1
read-write
n
0x0
0x0
SYSCTL_SCGCTIMER_S0
Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCTIMER_S1
Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCTIMER_S2
Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCTIMER_S3
Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCTIMER_S4
Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCTIMER_S5
Timer 5 Sleep Mode Clock Gating Control
5
6
SCGCUART
Universal Asynchronous Receiver/Transmitter Sleep Mode Clock Gating Control
0x718
-1
read-write
n
0x0
0x0
SYSCTL_SCGCUART_S0
UART Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCUART_S1
UART Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCUART_S2
UART Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCUART_S3
UART Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCUART_S4
UART Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCUART_S5
UART Module 5 Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCUART_S6
UART Module 6 Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCUART_S7
UART Module 7 Sleep Mode Clock Gating Control
7
8
SCGCUSB
Universal Serial Bus Sleep Mode Clock Gating Control
0x728
-1
read-write
n
0x0
0x0
SYSCTL_SCGCUSB_S0
USB Module Sleep Mode Clock Gating Control
0
1
SCGCWD
Watchdog Timer Sleep Mode Clock Gating Control
0x700
-1
read-write
n
0x0
0x0
SYSCTL_SCGCWD_S0
Watchdog Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWD_S1
Watchdog Timer 1 Sleep Mode Clock Gating Control
1
2
SCGCWTIMER
Wide Timer Sleep Mode Clock Gating Control
0x75C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCWTIMER_S0
Wide Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWTIMER_S1
Wide Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCWTIMER_S2
Wide Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCWTIMER_S3
Wide Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCWTIMER_S4
Wide Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCWTIMER_S5
Wide Timer 5 Sleep Mode Clock Gating Control
5
6
SRACMP
Analog Comparator Software Reset
0x53C
-1
read-write
n
0x0
0x0
SYSCTL_SRACMP_R0
Analog Comparator Module Software Reset
0
1
SRADC
Analog-to-Digital Converter Software Reset
0x538
-1
read-write
n
0x0
0x0
SYSCTL_SRADC_R0
ADC Module 0 Software Reset
0
1
SYSCTL_SRADC_R1
ADC Module 1 Software Reset
1
2
SRCAN
Controller Area Network Software Reset
0x534
-1
read-write
n
0x0
0x0
SYSCTL_SRCAN_R0
CAN Module 0 Software Reset
0
1
SYSCTL_SRCAN_R1
CAN Module 1 Software Reset
1
2
SRCR0
Software Reset Control 0
0x40
-1
read-write
n
0x0
0x0
SYSCTL_SRCR0_ADC0
ADC0 Reset Control
16
17
SYSCTL_SRCR0_ADC1
ADC1 Reset Control
17
18
SYSCTL_SRCR0_CAN0
CAN0 Reset Control
24
25
SYSCTL_SRCR0_CAN1
CAN1 Reset Control
25
26
SYSCTL_SRCR0_HIB
HIB Reset Control
6
7
SYSCTL_SRCR0_PWM0
PWM Reset Control
20
21
SYSCTL_SRCR0_WDT0
WDT0 Reset Control
3
4
SYSCTL_SRCR0_WDT1
WDT1 Reset Control
28
29
SRCR1
Software Reset Control 1
0x44
-1
read-write
n
0x0
0x0
SYSCTL_SRCR1_COMP0
Analog Comp 0 Reset Control
24
25
SYSCTL_SRCR1_COMP1
Analog Comp 1 Reset Control
25
26
SYSCTL_SRCR1_COMP2
Analog Comp 2 Reset Control
26
27
SYSCTL_SRCR1_I2C0
I2C0 Reset Control
12
13
SYSCTL_SRCR1_I2C1
I2C1 Reset Control
14
15
SYSCTL_SRCR1_QEI0
QEI0 Reset Control
8
9
SYSCTL_SRCR1_QEI1
QEI1 Reset Control
9
10
SYSCTL_SRCR1_SSI0
SSI0 Reset Control
4
5
SYSCTL_SRCR1_SSI1
SSI1 Reset Control
5
6
SYSCTL_SRCR1_TIMER0
Timer 0 Reset Control
16
17
SYSCTL_SRCR1_TIMER1
Timer 1 Reset Control
17
18
SYSCTL_SRCR1_TIMER2
Timer 2 Reset Control
18
19
SYSCTL_SRCR1_TIMER3
Timer 3 Reset Control
19
20
SYSCTL_SRCR1_UART0
UART0 Reset Control
0
1
SYSCTL_SRCR1_UART1
UART1 Reset Control
1
2
SYSCTL_SRCR1_UART2
UART2 Reset Control
2
3
SRCR2
Software Reset Control 2
0x48
-1
read-write
n
0x0
0x0
SYSCTL_SRCR2_GPIOA
Port A Reset Control
0
1
SYSCTL_SRCR2_GPIOB
Port B Reset Control
1
2
SYSCTL_SRCR2_GPIOC
Port C Reset Control
2
3
SYSCTL_SRCR2_GPIOD
Port D Reset Control
3
4
SYSCTL_SRCR2_GPIOE
Port E Reset Control
4
5
SYSCTL_SRCR2_GPIOF
Port F Reset Control
5
6
SYSCTL_SRCR2_GPIOG
Port G Reset Control
6
7
SYSCTL_SRCR2_GPIOH
Port H Reset Control
7
8
SYSCTL_SRCR2_GPIOJ
Port J Reset Control
8
9
SYSCTL_SRCR2_UDMA
Micro-DMA Reset Control
13
14
SYSCTL_SRCR2_USB0
USB0 Reset Control
16
17
SRDMA
Micro Direct Memory Access Software Reset
0x50C
-1
read-write
n
0x0
0x0
SYSCTL_SRDMA_R0
uDMA Module Software Reset
0
1
SREEPROM
EEPROM Software Reset
0x558
-1
read-write
n
0x0
0x0
SYSCTL_SREEPROM_R0
EEPROM Module Software Reset
0
1
SRGPIO
General-Purpose Input/Output Software Reset
0x508
-1
read-write
n
0x0
0x0
SYSCTL_SRGPIO_R0
GPIO Port A Software Reset
0
1
SYSCTL_SRGPIO_R1
GPIO Port B Software Reset
1
2
SYSCTL_SRGPIO_R10
GPIO Port L Software Reset
10
11
SYSCTL_SRGPIO_R11
GPIO Port M Software Reset
11
12
SYSCTL_SRGPIO_R12
GPIO Port N Software Reset
12
13
SYSCTL_SRGPIO_R13
GPIO Port P Software Reset
13
14
SYSCTL_SRGPIO_R14
GPIO Port Q Software Reset
14
15
SYSCTL_SRGPIO_R2
GPIO Port C Software Reset
2
3
SYSCTL_SRGPIO_R3
GPIO Port D Software Reset
3
4
SYSCTL_SRGPIO_R4
GPIO Port E Software Reset
4
5
SYSCTL_SRGPIO_R5
GPIO Port F Software Reset
5
6
SYSCTL_SRGPIO_R6
GPIO Port G Software Reset
6
7
SYSCTL_SRGPIO_R7
GPIO Port H Software Reset
7
8
SYSCTL_SRGPIO_R8
GPIO Port J Software Reset
8
9
SYSCTL_SRGPIO_R9
GPIO Port K Software Reset
9
10
SRI2C
Inter-Integrated Circuit Software Reset
0x520
-1
read-write
n
0x0
0x0
SYSCTL_SRI2C_R0
I2C Module 0 Software Reset
0
1
SYSCTL_SRI2C_R1
I2C Module 1 Software Reset
1
2
SYSCTL_SRI2C_R2
I2C Module 2 Software Reset
2
3
SYSCTL_SRI2C_R3
I2C Module 3 Software Reset
3
4
SYSCTL_SRI2C_R4
I2C Module 4 Software Reset
4
5
SYSCTL_SRI2C_R5
I2C Module 5 Software Reset
5
6
SRSSI
Synchronous Serial Interface Software Reset
0x51C
-1
read-write
n
0x0
0x0
SYSCTL_SRSSI_R0
SSI Module 0 Software Reset
0
1
SYSCTL_SRSSI_R1
SSI Module 1 Software Reset
1
2
SYSCTL_SRSSI_R2
SSI Module 2 Software Reset
2
3
SYSCTL_SRSSI_R3
SSI Module 3 Software Reset
3
4
SRTIMER
Timer Software Reset
0x504
-1
read-write
n
0x0
0x0
SYSCTL_SRTIMER_R0
Timer 0 Software Reset
0
1
SYSCTL_SRTIMER_R1
Timer 1 Software Reset
1
2
SYSCTL_SRTIMER_R2
Timer 2 Software Reset
2
3
SYSCTL_SRTIMER_R3
Timer 3 Software Reset
3
4
SYSCTL_SRTIMER_R4
Timer 4 Software Reset
4
5
SYSCTL_SRTIMER_R5
Timer 5 Software Reset
5
6
SRUART
Universal Asynchronous Receiver/Transmitter Software Reset
0x518
-1
read-write
n
0x0
0x0
SYSCTL_SRUART_R0
UART Module 0 Software Reset
0
1
SYSCTL_SRUART_R1
UART Module 1 Software Reset
1
2
SYSCTL_SRUART_R2
UART Module 2 Software Reset
2
3
SYSCTL_SRUART_R3
UART Module 3 Software Reset
3
4
SYSCTL_SRUART_R4
UART Module 4 Software Reset
4
5
SYSCTL_SRUART_R5
UART Module 5 Software Reset
5
6
SYSCTL_SRUART_R6
UART Module 6 Software Reset
6
7
SYSCTL_SRUART_R7
UART Module 7 Software Reset
7
8
SRUSB
Universal Serial Bus Software Reset
0x528
-1
read-write
n
0x0
0x0
SYSCTL_SRUSB_R0
USB Module Software Reset
0
1
SRWD
Watchdog Timer Software Reset
0x500
-1
read-write
n
0x0
0x0
SYSCTL_SRWD_R0
Watchdog Timer 0 Software Reset
0
1
SYSCTL_SRWD_R1
Watchdog Timer 1 Software Reset
1
2
SRWTIMER
Wide Timer Software Reset
0x55C
-1
read-write
n
0x0
0x0
SYSCTL_SRWTIMER_R0
Wide Timer 0 Software Reset
0
1
SYSCTL_SRWTIMER_R1
Wide Timer 1 Software Reset
1
2
SYSCTL_SRWTIMER_R2
Wide Timer 2 Software Reset
2
3
SYSCTL_SRWTIMER_R3
Wide Timer 3 Software Reset
3
4
SYSCTL_SRWTIMER_R4
Wide Timer 4 Software Reset
4
5
SYSCTL_SRWTIMER_R5
Wide Timer 5 Software Reset
5
6
SYSCTLDC0
Device Capabilities 0
0x8
read-write
n
0x0
0x0
SYSCTL_DC0_FLASHSZ
Flash Size
0
16
SYSCTL_DC0_FLASHSZ_64KB
64 KB of Flash
0x1f
SYSCTL_DC0_FLASHSZ_96KB
96 KB of Flash
0x2f
SYSCTL_DC0_FLASHSZ_8KB
8 KB of Flash
0x3
SYSCTL_DC0_FLASHSZ_128K
128 KB of Flash
0x3f
SYSCTL_DC0_FLASHSZ_192K
192 KB of Flash
0x5f
SYSCTL_DC0_FLASHSZ_16KB
16 KB of Flash
0x7
SYSCTL_DC0_FLASHSZ_256K
256 KB of Flash
0x7f
SYSCTL_DC0_FLASHSZ_32KB
32 KB of Flash
0xf
SYSCTL_DC0_SRAMSZ
SRAM Size
16
32
SYSCTL_DC0_SRAMSZ_6KB
6 KB of SRAM
0x17
SYSCTL_DC0_SRAMSZ_8KB
8 KB of SRAM
0x1f
SYSCTL_DC0_SRAMSZ_12KB
12 KB of SRAM
0x2f
SYSCTL_DC0_SRAMSZ_16KB
16 KB of SRAM
0x3f
SYSCTL_DC0_SRAMSZ_20KB
20 KB of SRAM
0x4f
SYSCTL_DC0_SRAMSZ_24KB
24 KB of SRAM
0x5f
SYSCTL_DC0_SRAMSZ_2KB
2 KB of SRAM
0x7
SYSCTL_DC0_SRAMSZ_32KB
32 KB of SRAM
0x7f
SYSCTL_DC0_SRAMSZ_4KB
4 KB of SRAM
0xf
SYSCTLDC1
Device Capabilities 1
0x10
read-write
n
0x0
0x0
SYSCTL_DC1_ADC0
ADC Module 0 Present
16
17
SYSCTL_DC1_ADC0SPD
Max ADC0 Speed
8
10
SYSCTL_DC1_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_DC1_ADC1
ADC Module 1 Present
17
18
SYSCTL_DC1_ADC1SPD
Max ADC1 Speed
10
12
SYSCTL_DC1_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_DC1_CAN0
CAN Module 0 Present
24
25
SYSCTL_DC1_CAN1
CAN Module 1 Present
25
26
SYSCTL_DC1_HIB
Hibernation Module Present
6
7
SYSCTL_DC1_JTAG
JTAG Present
0
1
SYSCTL_DC1_MINSYSDIV
System Clock Divider
12
16
SYSCTL_DC1_MINSYSDIV_100
Divide VCO (400MHZ) by 5 minimum
0x1
SYSCTL_DC1_MINSYSDIV_66
Divide VCO (400MHZ) by 2*2 + 2 = 6 minimum
0x2
SYSCTL_DC1_MINSYSDIV_50
Specifies a 50-MHz CPU clock with a PLL divider of 4
0x3
SYSCTL_DC1_MINSYSDIV_40
Specifies a 40-MHz CPU clock with a PLL divider of 5
0x4
SYSCTL_DC1_MINSYSDIV_25
Specifies a 25-MHz clock with a PLL divider of 8
0x7
SYSCTL_DC1_MINSYSDIV_20
Specifies a 20-MHz clock with a PLL divider of 10
0x9
SYSCTL_DC1_MPU
MPU Present
7
8
SYSCTL_DC1_PLL
PLL Present
4
5
SYSCTL_DC1_PWM0
PWM Module 0 Present
20
21
SYSCTL_DC1_PWM1
PWM Module 1 Present
21
22
SYSCTL_DC1_SWD
SWD Present
1
2
SYSCTL_DC1_SWO
SWO Trace Port Present
2
3
SYSCTL_DC1_TEMP
Temp Sensor Present
5
6
SYSCTL_DC1_WDT0
Watchdog Timer 0 Present
3
4
SYSCTL_DC1_WDT1
Watchdog Timer1 Present
28
29
SYSCTLDC2
Device Capabilities 2
0x14
read-write
n
0x0
0x0
SYSCTL_DC2_COMP0
Analog Comparator 0 Present
24
25
SYSCTL_DC2_COMP1
Analog Comparator 1 Present
25
26
SYSCTL_DC2_COMP2
Analog Comparator 2 Present
26
27
SYSCTL_DC2_EPI0
EPI Module 0 Present
30
31
SYSCTL_DC2_I2C0
I2C Module 0 Present
12
13
SYSCTL_DC2_I2C0HS
I2C Module 0 Speed
13
14
SYSCTL_DC2_I2C1
I2C Module 1 Present
14
15
SYSCTL_DC2_I2C1HS
I2C Module 1 Speed
15
16
SYSCTL_DC2_I2S0
I2S Module 0 Present
28
29
SYSCTL_DC2_QEI0
QEI Module 0 Present
8
9
SYSCTL_DC2_QEI1
QEI Module 1 Present
9
10
SYSCTL_DC2_SSI0
SSI Module 0 Present
4
5
SYSCTL_DC2_SSI1
SSI Module 1 Present
5
6
SYSCTL_DC2_TIMER0
Timer Module 0 Present
16
17
SYSCTL_DC2_TIMER1
Timer Module 1 Present
17
18
SYSCTL_DC2_TIMER2
Timer Module 2 Present
18
19
SYSCTL_DC2_TIMER3
Timer Module 3 Present
19
20
SYSCTL_DC2_UART0
UART Module 0 Present
0
1
SYSCTL_DC2_UART1
UART Module 1 Present
1
2
SYSCTL_DC2_UART2
UART Module 2 Present
2
3
SYSCTLDC3
Device Capabilities 3
0x18
read-write
n
0x0
0x0
SYSCTL_DC3_32KHZ
32KHz Input Clock Available
31
32
SYSCTL_DC3_ADC0AIN0
ADC Module 0 AIN0 Pin Present
16
17
SYSCTL_DC3_ADC0AIN1
ADC Module 0 AIN1 Pin Present
17
18
SYSCTL_DC3_ADC0AIN2
ADC Module 0 AIN2 Pin Present
18
19
SYSCTL_DC3_ADC0AIN3
ADC Module 0 AIN3 Pin Present
19
20
SYSCTL_DC3_ADC0AIN4
ADC Module 0 AIN4 Pin Present
20
21
SYSCTL_DC3_ADC0AIN5
ADC Module 0 AIN5 Pin Present
21
22
SYSCTL_DC3_ADC0AIN6
ADC Module 0 AIN6 Pin Present
22
23
SYSCTL_DC3_ADC0AIN7
ADC Module 0 AIN7 Pin Present
23
24
SYSCTL_DC3_C0MINUS
C0- Pin Present
6
7
SYSCTL_DC3_C0O
C0o Pin Present
8
9
SYSCTL_DC3_C0PLUS
C0+ Pin Present
7
8
SYSCTL_DC3_C1MINUS
C1- Pin Present
9
10
SYSCTL_DC3_C1O
C1o Pin Present
11
12
SYSCTL_DC3_C1PLUS
C1+ Pin Present
10
11
SYSCTL_DC3_C2MINUS
C2- Pin Present
12
13
SYSCTL_DC3_C2O
C2o Pin Present
14
15
SYSCTL_DC3_C2PLUS
C2+ Pin Present
13
14
SYSCTL_DC3_CCP0
CCP0 Pin Present
24
25
SYSCTL_DC3_CCP1
CCP1 Pin Present
25
26
SYSCTL_DC3_CCP2
CCP2 Pin Present
26
27
SYSCTL_DC3_CCP3
CCP3 Pin Present
27
28
SYSCTL_DC3_CCP4
CCP4 Pin Present
28
29
SYSCTL_DC3_CCP5
CCP5 Pin Present
29
30
SYSCTL_DC3_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC3_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC3_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC3_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC3_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC3_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC3_PWMFAULT
PWM Fault Pin Present
15
16
SYSCTLDC4
Device Capabilities 4
0x1C
read-write
n
0x0
0x0
SYSCTL_DC4_CCP6
CCP6 Pin Present
14
15
SYSCTL_DC4_CCP7
CCP7 Pin Present
15
16
SYSCTL_DC4_E1588
1588 Capable
24
25
SYSCTL_DC4_EMAC0
Ethernet MAC Layer 0 Present
28
29
SYSCTL_DC4_EPHY0
Ethernet PHY Layer 0 Present
30
31
SYSCTL_DC4_GPIOA
GPIO Port A Present
0
1
SYSCTL_DC4_GPIOB
GPIO Port B Present
1
2
SYSCTL_DC4_GPIOC
GPIO Port C Present
2
3
SYSCTL_DC4_GPIOD
GPIO Port D Present
3
4
SYSCTL_DC4_GPIOE
GPIO Port E Present
4
5
SYSCTL_DC4_GPIOF
GPIO Port F Present
5
6
SYSCTL_DC4_GPIOG
GPIO Port G Present
6
7
SYSCTL_DC4_GPIOH
GPIO Port H Present
7
8
SYSCTL_DC4_GPIOJ
GPIO Port J Present
8
9
SYSCTL_DC4_PICAL
PIOSC Calibrate
18
19
SYSCTL_DC4_ROM
Internal Code ROM Present
12
13
SYSCTL_DC4_UDMA
Micro-DMA Module Present
13
14
SYSCTLDC5
Device Capabilities 5
0x20
read-write
n
0x0
0x0
SYSCTL_DC5_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC5_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC5_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC5_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC5_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC5_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC5_PWM6
PWM6 Pin Present
6
7
SYSCTL_DC5_PWM7
PWM7 Pin Present
7
8
SYSCTL_DC5_PWMEFLT
PWM Extended Fault Active
21
22
SYSCTL_DC5_PWMESYNC
PWM Extended SYNC Active
20
21
SYSCTL_DC5_PWMFAULT0
PWM Fault 0 Pin Present
24
25
SYSCTL_DC5_PWMFAULT1
PWM Fault 1 Pin Present
25
26
SYSCTL_DC5_PWMFAULT2
PWM Fault 2 Pin Present
26
27
SYSCTL_DC5_PWMFAULT3
PWM Fault 3 Pin Present
27
28
SYSCTLDC6
Device Capabilities 6
0x24
read-write
n
0x0
0x0
SYSCTL_DC6_USB0
USB Module 0 Present
0
2
SYSCTL_DC6_USB0_DEV
USB0 is Device Only
0x1
SYSCTL_DC6_USB0_HOSTDEV
USB is Device or Host
0x2
SYSCTL_DC6_USB0_OTG
USB0 is OTG
0x3
SYSCTL_DC6_USB0PHY
USB Module 0 PHY Present
4
5
SYSCTLDC7
Device Capabilities 7
0x28
read-write
n
0x0
0x0
SYSCTL_DC7_DMACH0
USB_EP1_RX / UART2_RX
0
1
SYSCTL_DC7_DMACH1
USB_EP1_TX / UART2_TX
1
2
SYSCTL_DC7_DMACH10
SSI0_RX / SSI1_RX
10
11
SYSCTL_DC7_DMACH11
SSI0_TX / SSI1_TX
11
12
SYSCTL_DC7_DMACH12
CAN0_RX / UART2_RX
12
13
SYSCTL_DC7_DMACH13
CAN0_TX / UART2_TX
13
14
SYSCTL_DC7_DMACH14
ADC0_SS0 / Timer2A
14
15
SYSCTL_DC7_DMACH15
ADC0_SS1 / Timer2B
15
16
SYSCTL_DC7_DMACH16
ADC0_SS2
16
17
SYSCTL_DC7_DMACH17
ADC0_SS3
17
18
SYSCTL_DC7_DMACH18
Timer0A / Timer1A
18
19
SYSCTL_DC7_DMACH19
Timer0B / Timer1B
19
20
SYSCTL_DC7_DMACH2
USB_EP2_RX / Timer3A
2
3
SYSCTL_DC7_DMACH20
Timer1A / EPI0_NBRFIFO
20
21
SYSCTL_DC7_DMACH21
Timer1B / EPI0_WFIFO
21
22
SYSCTL_DC7_DMACH22
UART1_RX / CAN2_RX
22
23
SYSCTL_DC7_DMACH23
UART1_TX / CAN2_TX
23
24
SYSCTL_DC7_DMACH24
SSI1_RX / ADC1_SS0
24
25
SYSCTL_DC7_DMACH25
SSI1_TX / ADC1_SS1
25
26
SYSCTL_DC7_DMACH26
CAN1_RX / ADC1_SS2
26
27
SYSCTL_DC7_DMACH27
CAN1_TX / ADC1_SS3
27
28
SYSCTL_DC7_DMACH28
I2S0_RX / CAN1_RX
28
29
SYSCTL_DC7_DMACH29
I2S0_TX / CAN1_TX
29
30
SYSCTL_DC7_DMACH3
USB_EP2_TX / Timer3B
3
4
SYSCTL_DC7_DMACH30
SW
30
31
SYSCTL_DC7_DMACH4
USB_EP3_RX / Timer2A
4
5
SYSCTL_DC7_DMACH5
USB_EP3_TX / Timer2B
5
6
SYSCTL_DC7_DMACH6
ETH_RX / Timer2A
6
7
SYSCTL_DC7_DMACH7
ETH_TX / Timer2B
7
8
SYSCTL_DC7_DMACH8
UART0_RX / UART1_RX
8
9
SYSCTL_DC7_DMACH9
UART0_TX / UART1_TX
9
10
SYSCTLDC8
Device Capabilities 8 ADC Channels
0x2C
read-write
n
0x0
0x0
SYSCTL_DC8_ADC0AIN0
ADC Module 0 AIN0 Pin Present
0
1
SYSCTL_DC8_ADC0AIN1
ADC Module 0 AIN1 Pin Present
1
2
SYSCTL_DC8_ADC0AIN10
ADC Module 0 AIN10 Pin Present
10
11
SYSCTL_DC8_ADC0AIN11
ADC Module 0 AIN11 Pin Present
11
12
SYSCTL_DC8_ADC0AIN12
ADC Module 0 AIN12 Pin Present
12
13
SYSCTL_DC8_ADC0AIN13
ADC Module 0 AIN13 Pin Present
13
14
SYSCTL_DC8_ADC0AIN14
ADC Module 0 AIN14 Pin Present
14
15
SYSCTL_DC8_ADC0AIN15
ADC Module 0 AIN15 Pin Present
15
16
SYSCTL_DC8_ADC0AIN2
ADC Module 0 AIN2 Pin Present
2
3
SYSCTL_DC8_ADC0AIN3
ADC Module 0 AIN3 Pin Present
3
4
SYSCTL_DC8_ADC0AIN4
ADC Module 0 AIN4 Pin Present
4
5
SYSCTL_DC8_ADC0AIN5
ADC Module 0 AIN5 Pin Present
5
6
SYSCTL_DC8_ADC0AIN6
ADC Module 0 AIN6 Pin Present
6
7
SYSCTL_DC8_ADC0AIN7
ADC Module 0 AIN7 Pin Present
7
8
SYSCTL_DC8_ADC0AIN8
ADC Module 0 AIN8 Pin Present
8
9
SYSCTL_DC8_ADC0AIN9
ADC Module 0 AIN9 Pin Present
9
10
SYSCTL_DC8_ADC1AIN0
ADC Module 1 AIN0 Pin Present
16
17
SYSCTL_DC8_ADC1AIN1
ADC Module 1 AIN1 Pin Present
17
18
SYSCTL_DC8_ADC1AIN10
ADC Module 1 AIN10 Pin Present
26
27
SYSCTL_DC8_ADC1AIN11
ADC Module 1 AIN11 Pin Present
27
28
SYSCTL_DC8_ADC1AIN12
ADC Module 1 AIN12 Pin Present
28
29
SYSCTL_DC8_ADC1AIN13
ADC Module 1 AIN13 Pin Present
29
30
SYSCTL_DC8_ADC1AIN14
ADC Module 1 AIN14 Pin Present
30
31
SYSCTL_DC8_ADC1AIN15
ADC Module 1 AIN15 Pin Present
31
32
SYSCTL_DC8_ADC1AIN2
ADC Module 1 AIN2 Pin Present
18
19
SYSCTL_DC8_ADC1AIN3
ADC Module 1 AIN3 Pin Present
19
20
SYSCTL_DC8_ADC1AIN4
ADC Module 1 AIN4 Pin Present
20
21
SYSCTL_DC8_ADC1AIN5
ADC Module 1 AIN5 Pin Present
21
22
SYSCTL_DC8_ADC1AIN6
ADC Module 1 AIN6 Pin Present
22
23
SYSCTL_DC8_ADC1AIN7
ADC Module 1 AIN7 Pin Present
23
24
SYSCTL_DC8_ADC1AIN8
ADC Module 1 AIN8 Pin Present
24
25
SYSCTL_DC8_ADC1AIN9
ADC Module 1 AIN9 Pin Present
25
26
SYSCTLDC9
Device Capabilities 9 ADC Digital Comparators
0x190
read-write
n
0x0
0x0
SYSCTL_DC9_ADC0DC0
ADC0 DC0 Present
0
1
SYSCTL_DC9_ADC0DC1
ADC0 DC1 Present
1
2
SYSCTL_DC9_ADC0DC2
ADC0 DC2 Present
2
3
SYSCTL_DC9_ADC0DC3
ADC0 DC3 Present
3
4
SYSCTL_DC9_ADC0DC4
ADC0 DC4 Present
4
5
SYSCTL_DC9_ADC0DC5
ADC0 DC5 Present
5
6
SYSCTL_DC9_ADC0DC6
ADC0 DC6 Present
6
7
SYSCTL_DC9_ADC0DC7
ADC0 DC7 Present
7
8
SYSCTL_DC9_ADC1DC0
ADC1 DC0 Present
16
17
SYSCTL_DC9_ADC1DC1
ADC1 DC1 Present
17
18
SYSCTL_DC9_ADC1DC2
ADC1 DC2 Present
18
19
SYSCTL_DC9_ADC1DC3
ADC1 DC3 Present
19
20
SYSCTL_DC9_ADC1DC4
ADC1 DC4 Present
20
21
SYSCTL_DC9_ADC1DC5
ADC1 DC5 Present
21
22
SYSCTL_DC9_ADC1DC6
ADC1 DC6 Present
22
23
SYSCTL_DC9_ADC1DC7
ADC1 DC7 Present
23
24
SYSCTLDCGC0
Deep Sleep Mode Clock Gating Control Register 0
0x120
read-write
n
0x0
0x0
SYSCTL_DCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_DCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_DCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_DCGC0_CAN1
CAN1 Clock Gating Control
25
26
SYSCTL_DCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_DCGC0_PWM0
PWM Clock Gating Control
20
21
SYSCTL_DCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_DCGC0_WDT1
WDT1 Clock Gating Control
28
29
SYSCTLDCGC1
Deep-Sleep Mode Clock Gating Control Register 1
0x124
read-write
n
0x0
0x0
SYSCTL_DCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_DCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_DCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_DCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_DCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_DCGC1_QEI0
QEI0 Clock Gating Control
8
9
SYSCTL_DCGC1_QEI1
QEI1 Clock Gating Control
9
10
SYSCTL_DCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_DCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_DCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_DCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_DCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_DCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_DCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_DCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_DCGC1_UART2
UART2 Clock Gating Control
2
3
SYSCTLDCGC2
Deep Sleep Mode Clock Gating Control Register 2
0x128
read-write
n
0x0
0x0
SYSCTL_DCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_DCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_DCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_DCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_DCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_DCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_DCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_DCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_DCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_DCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTL_DCGC2_USB0
USB0 Clock Gating Control
16
17
SYSCTLDCGCACMP
Analog Comparator Deep-Sleep Mode Clock Gating Control
0x83C
read-write
n
0x0
0x0
SYSCTL_DCGCACMP_D0
Analog Comparator Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCADC
Analog-to-Digital Converter Deep-Sleep Mode Clock Gating Control
0x838
read-write
n
0x0
0x0
SYSCTL_DCGCADC_D0
ADC Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCADC_D1
ADC Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTLDCGCCAN
Controller Area Network Deep-Sleep Mode Clock Gating Control
0x834
read-write
n
0x0
0x0
SYSCTL_DCGCCAN_D0
CAN Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCCAN_D1
CAN Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTLDCGCDMA
Micro Direct Memory Access Deep-Sleep Mode Clock Gating Control
0x80C
read-write
n
0x0
0x0
SYSCTL_DCGCDMA_D0
uDMA Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCEEPROM
EEPROM Deep-Sleep Mode Clock Gating Control
0x858
read-write
n
0x0
0x0
SYSCTL_DCGCEEPROM_D0
EEPROM Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCGPIO
General-Purpose Input/Output Deep-Sleep Mode Clock Gating Control
0x808
read-write
n
0x0
0x0
SYSCTL_DCGCGPIO_D0
GPIO Port A Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCGPIO_D1
GPIO Port B Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCGPIO_D10
GPIO Port L Deep-Sleep Mode Clock Gating Control
10
11
SYSCTL_DCGCGPIO_D11
GPIO Port M Deep-Sleep Mode Clock Gating Control
11
12
SYSCTL_DCGCGPIO_D12
GPIO Port N Deep-Sleep Mode Clock Gating Control
12
13
SYSCTL_DCGCGPIO_D13
GPIO Port P Deep-Sleep Mode Clock Gating Control
13
14
SYSCTL_DCGCGPIO_D14
GPIO Port Q Deep-Sleep Mode Clock Gating Control
14
15
SYSCTL_DCGCGPIO_D2
GPIO Port C Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCGPIO_D3
GPIO Port D Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCGPIO_D4
GPIO Port E Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCGPIO_D5
GPIO Port F Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCGPIO_D6
GPIO Port G Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCGPIO_D7
0Mode Clock Gating Control
7
8
SYSCTL_DCGCGPIO_D8
GPIO Port J Deep-Sleep Mode Clock Gating Control
8
9
SYSCTL_DCGCGPIO_D9
GPIO Port K Deep-Sleep Mode Clock Gating Control
9
10
SYSCTLDCGCI2C
Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control
0x820
read-write
n
0x0
0x0
SYSCTL_DCGCI2C_D0
I2C Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCI2C_D1
I2C Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCI2C_D2
I2C Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCI2C_D3
I2C Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCI2C_D4
I2C Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCI2C_D5
I2C Module 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTLDCGCSSI
Synchronous Serial Interface Deep-Sleep Mode Clock Gating Control
0x81C
read-write
n
0x0
0x0
SYSCTL_DCGCSSI_D0
SSI Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCSSI_D1
SSI Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCSSI_D2
SSI Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCSSI_D3
SSI Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTLDCGCTIMER
Timer Deep-Sleep Mode Clock Gating Control
0x804
read-write
n
0x0
0x0
SYSCTL_DCGCTIMER_D0
Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCTIMER_D1
Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCTIMER_D2
Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCTIMER_D3
Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCTIMER_D4
Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCTIMER_D5
Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTLDCGCUART
Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control
0x818
read-write
n
0x0
0x0
SYSCTL_DCGCUART_D0
UART Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCUART_D1
UART Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCUART_D2
UART Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCUART_D3
UART Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCUART_D4
UART Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCUART_D5
UART Module 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCUART_D6
UART Module 6 Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCUART_D7
UART Module 7 Deep-Sleep Mode Clock Gating Control
7
8
SYSCTLDCGCUSB
Universal Serial Bus Deep-Sleep Mode Clock Gating Control
0x828
read-write
n
0x0
0x0
SYSCTL_DCGCUSB_D0
USB Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCWD
Watchdog Timer Deep-Sleep Mode Clock Gating Control
0x800
read-write
n
0x0
0x0
SYSCTL_DCGCWD_D0
Watchdog Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWD_D1
Watchdog Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTLDCGCWTIMER
Wide Timer Deep-Sleep Mode Clock Gating Control
0x85C
read-write
n
0x0
0x0
SYSCTL_DCGCWTIMER_D0
Wide Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWTIMER_D1
Wide Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCWTIMER_D2
Wide Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCWTIMER_D3
Wide Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCWTIMER_D4
Wide Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCWTIMER_D5
Wide Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTLDID0
Device Identification 0
0x0
read-write
n
0x0
0x0
SYSCTL_DID0_CLASS
Device Class
16
24
SYSCTL_DID0_CLASS_BLIZZARD
Stellaris(R) Blizzard-class microcontrollers
0x5
SYSCTL_DID0_MAJ
Major Revision
8
16
SYSCTL_DID0_MAJ_REVA
Revision A (initial device)
0x0
SYSCTL_DID0_MAJ_REVB
Revision B (first base layer revision)
0x1
SYSCTL_DID0_MAJ_REVC
Revision C (second base layer revision)
0x2
SYSCTL_DID0_MIN
Minor Revision
0
8
SYSCTL_DID0_MIN_0
Initial device, or a major revision update
0x0
SYSCTL_DID0_MIN_1
First metal layer change
0x1
SYSCTL_DID0_MIN_2
Second metal layer change
0x2
SYSCTL_DID0_VER
DID0 Version
28
31
SYSCTL_DID0_VER_1
Second version of the DID0 register format
0x1
SYSCTLDID1
Device Identification 1
0x4
read-write
n
0x0
0x0
SYSCTL_DID1_FAM
Family
24
28
SYSCTL_DID1_FAM_STELLARIS
Stellaris family of microcontollers, that is, all devices with external part numbers starting with LM3S
0x0
SYSCTL_DID1_PINCNT
Package Pin Count
13
16
SYSCTL_DID1_PINCNT_28
28 pin package
0x0
SYSCTL_DID1_PINCNT_48
48-pin package
0x1
SYSCTL_DID1_PINCNT_100
100-pin package
0x2
SYSCTL_DID1_PINCNT_64
64-pin package
0x3
SYSCTL_DID1_PINCNT_144
144-pin package
0x4
SYSCTL_DID1_PINCNT_157
157-pin package
0x5
SYSCTL_DID1_PKG
Package Type
3
5
SYSCTL_DID1_PKG_SOIC
SOIC package
0x0
SYSCTL_DID1_PKG_QFP
LQFP package
0x1
SYSCTL_DID1_PKG_BGA
BGA package
0x2
SYSCTL_DID1_PRTNO
Part Number
16
24
SYSCTL_DID1_PRTNO_LM4F121C4QR
LM4F121C4QR
0x9
SYSCTL_DID1_QUAL
Qualification Status
0
2
SYSCTL_DID1_QUAL_ES
Engineering Sample (unqualified)
0x0
SYSCTL_DID1_QUAL_PP
Pilot Production (unqualified)
0x1
SYSCTL_DID1_QUAL_FQ
Fully Qualified
0x2
SYSCTL_DID1_ROHS
RoHS-Compliance
2
3
SYSCTL_DID1_TEMP
Temperature Range
5
8
SYSCTL_DID1_TEMP_C
Commercial temperature range (0C to 70C)
0x0
SYSCTL_DID1_TEMP_I
Industrial temperature range (-40C to 85C)
0x1
SYSCTL_DID1_TEMP_E
Extended temperature range (-40C to 105C)
0x2
SYSCTL_DID1_VER
DID1 Version
28
32
SYSCTL_DID1_VER_0
Initial DID1 register format definition, indicating a Stellaris LM3Snnn device
0x0
SYSCTL_DID1_VER_1
Second version of the DID1 register format
0x1
SYSCTLDSLPCLKCFG
Deep Sleep Clock Configuration
0x144
read-write
n
0x0
0x0
SYSCTL_DSLPCLKCFG_D
Divider Field Override
23
29
SYSCTL_DSLPCLKCFG_D_1
System clock /1
0x0
SYSCTL_DSLPCLKCFG_D_2
System clock /2
0x1
SYSCTL_DSLPCLKCFG_D_3
System clock /3
0x2
SYSCTL_DSLPCLKCFG_D_4
System clock /4
0x3
SYSCTL_DSLPCLKCFG_D_64
System clock /64
0x3f
SYSCTL_DSLPCLKCFG_O
Clock Source
4
7
SYSCTL_DSLPCLKCFG_O_IGN
MOSC
0x0
SYSCTL_DSLPCLKCFG_O_IO
PIOSC
0x1
SYSCTL_DSLPCLKCFG_O_30
30 kHz
0x3
SYSCTLGPIOHBCTL
GPIO High-Performance Bus Control
0x6C
read-write
n
0x0
0x0
SYSCTL_GPIOHBCTL_PORTA
Port A Advanced High-Performance Bus
0
1
SYSCTL_GPIOHBCTL_PORTB
Port B Advanced High-Performance Bus
1
2
SYSCTL_GPIOHBCTL_PORTC
Port C Advanced High-Performance Bus
2
3
SYSCTL_GPIOHBCTL_PORTD
Port D Advanced High-Performance Bus
3
4
SYSCTL_GPIOHBCTL_PORTE
Port E Advanced High-Performance Bus
4
5
SYSCTL_GPIOHBCTL_PORTF
Port F Advanced High-Performance Bus
5
6
SYSCTL_GPIOHBCTL_PORTG
Port G Advanced High-Performance Bus
6
7
SYSCTLIMC
Interrupt Mask Control
0x54
read-write
n
0x0
0x0
SYSCTL_IMC_BORIM
Brown-Out Reset Interrupt Mask
1
2
SYSCTL_IMC_MOFIM
Main Oscillator Fault Interrupt Mask
3
4
SYSCTL_IMC_MOSCPUPIM
MOSC Power Up Interrupt Mask
8
9
SYSCTL_IMC_PLLLIM
PLL Lock Interrupt Mask
6
7
SYSCTL_IMC_USBPLLLIM
USB PLL Lock Interrupt Mask
7
8
SYSCTLMISC
Masked Interrupt Status and Clear
0x58
read-write
n
0x0
0x0
SYSCTL_MISC_BORMIS
BOR Masked Interrupt Status
1
2
SYSCTL_MISC_MOFMIS
Main Oscillator Fault Masked Interrupt Status
3
4
SYSCTL_MISC_MOSCPUPMIS
MOSC Power Up Masked Interrupt Status
8
9
SYSCTL_MISC_PLLLMIS
PLL Lock Masked Interrupt Status
6
7
SYSCTL_MISC_USBPLLLMIS
USB PLL Lock Masked Interrupt Status
7
8
SYSCTLMOSCCTL
Main Oscillator Control
0x7C
read-write
n
0x0
0x0
SYSCTL_MOSCCTL_CVAL
Clock Validation for MOSC
0
1
SYSCTL_MOSCCTL_MOSCIM
MOSC Failure Action
1
2
SYSCTL_MOSCCTL_NOXTAL
No Crystal Connected
2
3
SYSCTLNVMSTAT
Non-Volatile Memory Information
0x1A0
read-write
n
0x0
0x0
SYSCTL_NVMSTAT_FWB
32 Word Flash Write Buffer Active
0
1
SYSCTL_NVMSTAT_TPSW
Third Party Software Present
4
5
SYSCTLPBORCTL
Brown-Out Reset Control
0x30
read-write
n
0x0
0x0
SYSCTL_PBORCTL_BORIOR
BOR Interrupt or Reset
1
2
SYSCTLPCACMP
Analog Comparator Power Control
0x93C
read-write
n
0x0
0x0
SYSCTL_PCACMP_P0
Analog Comparator Module 0 Power Control
0
1
SYSCTLPCADC
Analog-to-Digital Converter Power Control
0x938
read-write
n
0x0
0x0
SYSCTL_PCADC_P0
ADC Module 0 Power Control
0
1
SYSCTL_PCADC_P1
ADC Module 1 Power Control
1
2
SYSCTLPCCAN
Controller Area Network Power Control
0x934
read-write
n
0x0
0x0
SYSCTL_PCCAN_P0
CAN Module 0 Power Control
0
1
SYSCTL_PCCAN_P1
CAN Module 1 Power Control
1
2
SYSCTLPCDMA
Micro Direct Memory Access Power Control
0x90C
read-write
n
0x0
0x0
SYSCTL_PCDMA_P0
uDMA Module Power Control
0
1
SYSCTLPCEEPROM
EEPROM Power Control
0x958
read-write
n
0x0
0x0
SYSCTL_PCEEPROM_P0
EEPROM Module Power Control
0
1
SYSCTLPCGPIO
General-Purpose Input/Output Power Control
0x908
read-write
n
0x0
0x0
SYSCTL_PCGPIO_P0
GPIO Port A Power Control
0
1
SYSCTL_PCGPIO_P1
GPIO Port B Power Control
1
2
SYSCTL_PCGPIO_P10
GPIO Port L Power Control
10
11
SYSCTL_PCGPIO_P11
GPIO Port M Power Control
11
12
SYSCTL_PCGPIO_P12
GPIO Port N Power Control
12
13
SYSCTL_PCGPIO_P13
GPIO Port P Power Control
13
14
SYSCTL_PCGPIO_P14
GPIO Port Q Power Control
14
15
SYSCTL_PCGPIO_P2
GPIO Port C Power Control
2
3
SYSCTL_PCGPIO_P3
GPIO Port D Power Control
3
4
SYSCTL_PCGPIO_P4
GPIO Port E Power Control
4
5
SYSCTL_PCGPIO_P5
GPIO Port F Power Control
5
6
SYSCTL_PCGPIO_P6
GPIO Port G Power Control
6
7
SYSCTL_PCGPIO_P7
GPIO Port H Power Control
7
8
SYSCTL_PCGPIO_P8
GPIO Port J Power Control
8
9
SYSCTL_PCGPIO_P9
GPIO Port K Power Control
9
10
SYSCTLPCI2C
Inter-Integrated Circuit Power Control
0x920
read-write
n
0x0
0x0
SYSCTL_PCI2C_P0
I2C Module 0 Power Control
0
1
SYSCTL_PCI2C_P1
I2C Module 1 Power Control
1
2
SYSCTL_PCI2C_P2
I2C Module 2 Power Control
2
3
SYSCTL_PCI2C_P3
I2C Module 3 Power Control
3
4
SYSCTL_PCI2C_P4
I2C Module 4 Power Control
4
5
SYSCTL_PCI2C_P5
I2C Module 5 Power Control
5
6
SYSCTLPCSSI
Synchronous Serial Interface Power Control
0x91C
read-write
n
0x0
0x0
SYSCTL_PCSSI_P0
SSI Module 0 Power Control
0
1
SYSCTL_PCSSI_P1
SSI Module 1 Power Control
1
2
SYSCTL_PCSSI_P2
SSI Module 2 Power Control
2
3
SYSCTL_PCSSI_P3
SSI Module 3 Power Control
3
4
SYSCTLPCTIMER
Timer Power Control
0x904
read-write
n
0x0
0x0
SYSCTL_PCTIMER_P0
Timer 0 Power Control
0
1
SYSCTL_PCTIMER_P1
Timer 1 Power Control
1
2
SYSCTL_PCTIMER_P2
Timer 2 Power Control
2
3
SYSCTL_PCTIMER_P3
Timer 3 Power Control
3
4
SYSCTL_PCTIMER_P4
Timer 4 Power Control
4
5
SYSCTL_PCTIMER_P5
Timer 5 Power Control
5
6
SYSCTLPCUART
Universal Asynchronous Receiver/Transmitter Power Control
0x918
read-write
n
0x0
0x0
SYSCTL_PCUART_P0
UART Module 0 Power Control
0
1
SYSCTL_PCUART_P1
UART Module 1 Power Control
1
2
SYSCTL_PCUART_P2
UART Module 2 Power Control
2
3
SYSCTL_PCUART_P3
UART Module 3 Power Control
3
4
SYSCTL_PCUART_P4
UART Module 4 Power Control
4
5
SYSCTL_PCUART_P5
UART Module 5 Power Control
5
6
SYSCTL_PCUART_P6
UART Module 6 Power Control
6
7
SYSCTL_PCUART_P7
UART Module 7 Power Control
7
8
SYSCTLPCUSB
Universal Serial Bus Power Control
0x928
read-write
n
0x0
0x0
SYSCTL_PCUSB_P0
USB Module Power Control
0
1
SYSCTLPCWD
Watchdog Timer Power Control
0x900
read-write
n
0x0
0x0
SYSCTL_PCWD_P0
Watchdog Timer 0 Power Control
0
1
SYSCTL_PCWD_P1
Watchdog Timer 1 Power Control
1
2
SYSCTLPCWTIMER
Wide Timer Power Control
0x95C
read-write
n
0x0
0x0
SYSCTL_PCWTIMER_P0
Wide Timer 0 Power Control
0
1
SYSCTL_PCWTIMER_P1
Wide Timer 1 Power Control
1
2
SYSCTL_PCWTIMER_P2
Wide Timer 2 Power Control
2
3
SYSCTL_PCWTIMER_P3
Wide Timer 3 Power Control
3
4
SYSCTL_PCWTIMER_P4
Wide Timer 4 Power Control
4
5
SYSCTL_PCWTIMER_P5
Wide Timer 5 Power Control
5
6
SYSCTLPIOSCCAL
Precision Internal Oscillator Calibration
0x150
read-write
n
0x0
0x0
SYSCTL_PIOSCCAL_UPDATE
Update Trim
8
9
SYSCTL_PIOSCCAL_UT
User Trim Value
0
7
SYSCTL_PIOSCCAL_UTEN
Use User Trim Value
31
32
SYSCTLPLLFREQ0
PLL Frequency 0
0x160
read-write
n
0x0
0x0
SYSCTL_PLLFREQ0_MFRAC
PLL M Fractional Value
10
20
SYSCTL_PLLFREQ0_MINT
PLL M Integer Value
0
10
SYSCTLPLLFREQ1
PLL Frequency
0x164
read-write
n
0x0
0x0
SYSCTL_PLLFREQ1_N
PLL N Value
0
5
SYSCTL_PLLFREQ1_Q
PLL Q Value
8
13
SYSCTLPLLSTAT
PLL Status
0x168
read-write
n
0x0
0x0
SYSCTL_PLLSTAT_LOCK
PLL Lock
0
1
SYSCTLPPACMP
Analog Comparator Peripheral Present
0x33C
read-write
n
0x0
0x0
SYSCTL_PPACMP_P0
Analog Comparator Module Present
0
1
SYSCTLPPADC
Analog-to-Digital Converter Peripheral Present
0x338
read-write
n
0x0
0x0
SYSCTL_PPADC_P0
ADC Module 0 Present
0
1
SYSCTL_PPADC_P1
ADC Module 1 Present
1
2
SYSCTLPPCAN
Controller Area Network Peripheral Present
0x334
read-write
n
0x0
0x0
SYSCTL_PPCAN_P0
CAN Module 0 Present
0
1
SYSCTL_PPCAN_P1
CAN Module 1 Present
1
2
SYSCTLPPDMA
Micro Direct Memory Access Peripheral Present
0x30C
read-write
n
0x0
0x0
SYSCTL_PPDMA_P0
uDMA Module Present
0
1
SYSCTLPPEEPROM
EEPROM Peripheral Present
0x358
read-write
n
0x0
0x0
SYSCTL_PPEEPROM_P0
EEPROM Module Present
0
1
SYSCTLPPEPI
External Peripheral Interface Peripheral Present
0x310
read-write
n
0x0
0x0
SYSCTL_PPEPI_P0
EPI Module Present
0
1
SYSCTLPPETH
Ethernet MAC Peripheral Present
0x32C
read-write
n
0x0
0x0
SYSCTL_PPETH_P0
Ethernet MAC Module Present
0
1
SYSCTLPPETHPHY
Ethernet PHY Peripheral Present
0x330
read-write
n
0x0
0x0
SYSCTL_PPETHPHY_P0
Ethernet PHY Module Present
0
1
SYSCTLPPGPIO
General-Purpose Input/Output Peripheral Present
0x308
read-write
n
0x0
0x0
SYSCTL_PPGPIO_P0
GPIO Port A Present
0
1
SYSCTL_PPGPIO_P1
GPIO Port B Present
1
2
SYSCTL_PPGPIO_P10
GPIO Port L Present
10
11
SYSCTL_PPGPIO_P11
GPIO Port M Present
11
12
SYSCTL_PPGPIO_P12
GPIO Port N Present
12
13
SYSCTL_PPGPIO_P13
GPIO Port P Present
13
14
SYSCTL_PPGPIO_P14
GPIO Port Q Present
14
15
SYSCTL_PPGPIO_P2
GPIO Port C Present
2
3
SYSCTL_PPGPIO_P3
GPIO Port D Present
3
4
SYSCTL_PPGPIO_P4
GPIO Port E Present
4
5
SYSCTL_PPGPIO_P5
GPIO Port F Present
5
6
SYSCTL_PPGPIO_P6
GPIO Port G Present
6
7
SYSCTL_PPGPIO_P7
GPIO Port H Present
7
8
SYSCTL_PPGPIO_P8
GPIO Port J Present
8
9
SYSCTL_PPGPIO_P9
GPIO Port K Present
9
10
SYSCTLPPHIB
Hibernation Peripheral Present
0x314
read-write
n
0x0
0x0
SYSCTL_PPHIB_P0
Hibernation Module Present
0
1
SYSCTLPPI2C
Inter-Integrated Circuit Peripheral Present
0x320
read-write
n
0x0
0x0
SYSCTL_PPI2C_P0
I2C Module 0 Present
0
1
SYSCTL_PPI2C_P1
I2C Module 1 Present
1
2
SYSCTL_PPI2C_P2
I2C Module 2 Present
2
3
SYSCTL_PPI2C_P3
I2C Module 3 Present
3
4
SYSCTL_PPI2C_P4
I2C Module 4 Present
4
5
SYSCTL_PPI2C_P5
I2C Module 5 Present
5
6
SYSCTLPPI2S
Inter-Integrated Circuit Sound Peripheral Present
0x324
read-write
n
0x0
0x0
SYSCTL_PPI2S_P0
I2S Module Present
0
1
SYSCTLPPPWM
Pulse Width Modulator Peripheral Present
0x340
read-write
n
0x0
0x0
SYSCTL_PPPWM_P0
PWM Module 0 Present
0
1
SYSCTL_PPPWM_P1
PWM Module 1 Present
1
2
SYSCTLPPQEI
Quadrature Encoder Interface Peripheral Present
0x344
read-write
n
0x0
0x0
SYSCTL_PPQEI_P0
QEI Module 0 Present
0
1
SYSCTL_PPQEI_P1
QEI Module 1 Present
1
2
SYSCTLPPSSI
Synchronous Serial Interface Peripheral Present
0x31C
read-write
n
0x0
0x0
SYSCTL_PPSSI_P0
SSI Module 0 Present
0
1
SYSCTL_PPSSI_P1
SSI Module 1 Present
1
2
SYSCTL_PPSSI_P2
SSI Module 2 Present
2
3
SYSCTL_PPSSI_P3
SSI Module 3 Present
3
4
SYSCTLPPTIMER
Timer Peripheral Present
0x304
read-write
n
0x0
0x0
SYSCTL_PPTIMER_P0
Timer 0 Present
0
1
SYSCTL_PPTIMER_P1
Timer 1 Present
1
2
SYSCTL_PPTIMER_P2
Timer 2 Present
2
3
SYSCTL_PPTIMER_P3
Timer 3 Present
3
4
SYSCTL_PPTIMER_P4
Timer 4 Present
4
5
SYSCTL_PPTIMER_P5
Timer 5 Present
5
6
SYSCTLPPUART
Universal Asynchronous Receiver/Transmitter Peripheral Present
0x318
read-write
n
0x0
0x0
SYSCTL_PPUART_P0
UART Module 0 Present
0
1
SYSCTL_PPUART_P1
UART Module 1 Present
1
2
SYSCTL_PPUART_P2
UART Module 2 Present
2
3
SYSCTL_PPUART_P3
UART Module 3 Present
3
4
SYSCTL_PPUART_P4
UART Module 4 Present
4
5
SYSCTL_PPUART_P5
UART Module 5 Present
5
6
SYSCTL_PPUART_P6
UART Module 6 Present
6
7
SYSCTL_PPUART_P7
UART Module 7 Present
7
8
SYSCTLPPUSB
Universal Serial Bus Peripheral Present
0x328
read-write
n
0x0
0x0
SYSCTL_PPUSB_P0
USB Module Present
0
1
SYSCTLPPWD
Watchdog Timer Peripheral Present
0x300
read-write
n
0x0
0x0
SYSCTL_PPWD_P0
Watchdog Timer 0 Present
0
1
SYSCTL_PPWD_P1
Watchdog Timer 1 Present
1
2
SYSCTLPPWTIMER
Wide Timer Peripheral Present
0x35C
read-write
n
0x0
0x0
SYSCTL_PPWTIMER_P0
Wide Timer 0 Present
0
1
SYSCTL_PPWTIMER_P1
Wide Timer 1 Present
1
2
SYSCTL_PPWTIMER_P2
Wide Timer 2 Present
2
3
SYSCTL_PPWTIMER_P3
Wide Timer 3 Present
3
4
SYSCTL_PPWTIMER_P4
Wide Timer 4 Present
4
5
SYSCTL_PPWTIMER_P5
Wide Timer 5 Present
5
6
SYSCTLPRACMP
Analog Comparator Peripheral Ready
0xA3C
read-write
n
0x0
0x0
SYSCTL_PRACMP_R0
Analog Comparator Module Peripheral Ready
0
1
SYSCTLPRADC
Analog-to-Digital Converter Peripheral Ready
0xA38
read-write
n
0x0
0x0
SYSCTL_PRADC_R0
ADC Module 0 Peripheral Ready
0
1
SYSCTL_PRADC_R1
ADC Module 1 Peripheral Ready
1
2
SYSCTLPRCAN
Controller Area Network Peripheral Ready
0xA34
read-write
n
0x0
0x0
SYSCTL_PRCAN_R0
CAN Module 0 Peripheral Ready
0
1
SYSCTL_PRCAN_R1
CAN Module 1 Peripheral Ready
1
2
SYSCTLPRDMA
Micro Direct Memory Access Peripheral Ready
0xA0C
read-write
n
0x0
0x0
SYSCTL_PRDMA_R0
uDMA Module Peripheral Ready
0
1
SYSCTLPREEPROM
EEPROM Peripheral Ready
0xA58
read-write
n
0x0
0x0
SYSCTL_PREEPROM_R0
EEPROM Module Peripheral Ready
0
1
SYSCTLPRGPIO
General-Purpose Input/Output Peripheral Ready
0xA08
read-write
n
0x0
0x0
SYSCTL_PRGPIO_R0
GPIO Port A Peripheral Ready
0
1
SYSCTL_PRGPIO_R1
GPIO Port B Peripheral Ready
1
2
SYSCTL_PRGPIO_R10
GPIO Port L Peripheral Ready
10
11
SYSCTL_PRGPIO_R11
GPIO Port M Peripheral Ready
11
12
SYSCTL_PRGPIO_R12
GPIO Port N Peripheral Ready
12
13
SYSCTL_PRGPIO_R13
GPIO Port P Peripheral Ready
13
14
SYSCTL_PRGPIO_R14
GPIO Port Q Peripheral Ready
14
15
SYSCTL_PRGPIO_R2
GPIO Port C Peripheral Ready
2
3
SYSCTL_PRGPIO_R3
GPIO Port D Peripheral Ready
3
4
SYSCTL_PRGPIO_R4
GPIO Port E Peripheral Ready
4
5
SYSCTL_PRGPIO_R5
GPIO Port F Peripheral Ready
5
6
SYSCTL_PRGPIO_R6
GPIO Port G Peripheral Ready
6
7
SYSCTL_PRGPIO_R7
GPIO Port H Peripheral Ready
7
8
SYSCTL_PRGPIO_R8
GPIO Port J Peripheral Ready
8
9
SYSCTL_PRGPIO_R9
GPIO Port K Peripheral Ready
9
10
SYSCTLPRI2C
Inter-Integrated Circuit Peripheral Ready
0xA20
read-write
n
0x0
0x0
SYSCTL_PRI2C_R0
I2C Module 0 Peripheral Ready
0
1
SYSCTL_PRI2C_R1
I2C Module 1 Peripheral Ready
1
2
SYSCTL_PRI2C_R2
I2C Module 2 Peripheral Ready
2
3
SYSCTL_PRI2C_R3
I2C Module 3 Peripheral Ready
3
4
SYSCTL_PRI2C_R4
I2C Module 4 Peripheral Ready
4
5
SYSCTL_PRI2C_R5
I2C Module 5 Peripheral Ready
5
6
SYSCTLPRSSI
Synchronous Serial Interface Peripheral Ready
0xA1C
read-write
n
0x0
0x0
SYSCTL_PRSSI_R0
SSI Module 0 Peripheral Ready
0
1
SYSCTL_PRSSI_R1
SSI Module 1 Peripheral Ready
1
2
SYSCTL_PRSSI_R2
SSI Module 2 Peripheral Ready
2
3
SYSCTL_PRSSI_R3
SSI Module 3 Peripheral Ready
3
4
SYSCTLPRTIMER
Timer Peripheral Ready
0xA04
read-write
n
0x0
0x0
SYSCTL_PRTIMER_R0
Timer 0 Peripheral Ready
0
1
SYSCTL_PRTIMER_R1
Timer 1 Peripheral Ready
1
2
SYSCTL_PRTIMER_R2
Timer 2 Peripheral Ready
2
3
SYSCTL_PRTIMER_R3
Timer 3 Peripheral Ready
3
4
SYSCTL_PRTIMER_R4
Timer 4 Peripheral Ready
4
5
SYSCTL_PRTIMER_R5
Timer 5 Peripheral Ready
5
6
SYSCTLPRUART
Universal Asynchronous Receiver/Transmitter Peripheral Ready
0xA18
read-write
n
0x0
0x0
SYSCTL_PRUART_R0
UART Module 0 Peripheral Ready
0
1
SYSCTL_PRUART_R1
UART Module 1 Peripheral Ready
1
2
SYSCTL_PRUART_R2
UART Module 2 Peripheral Ready
2
3
SYSCTL_PRUART_R3
UART Module 3 Peripheral Ready
3
4
SYSCTL_PRUART_R4
UART Module 4 Peripheral Ready
4
5
SYSCTL_PRUART_R5
UART Module 5 Peripheral Ready
5
6
SYSCTL_PRUART_R6
UART Module 6 Peripheral Ready
6
7
SYSCTL_PRUART_R7
UART Module 7 Peripheral Ready
7
8
SYSCTLPRUSB
Universal Serial Bus Peripheral Ready
0xA28
read-write
n
0x0
0x0
SYSCTL_PRUSB_R0
USB Module Peripheral Ready
0
1
SYSCTLPRWD
Watchdog Timer Peripheral Ready
0xA00
read-write
n
0x0
0x0
SYSCTL_PRWD_R0
Watchdog Timer 0 Peripheral Ready
0
1
SYSCTL_PRWD_R1
Watchdog Timer 1 Peripheral Ready
1
2
SYSCTLPRWTIMER
Wide Timer Peripheral Ready
0xA5C
read-write
n
0x0
0x0
SYSCTL_PRWTIMER_R0
Wide Timer 0 Peripheral Ready
0
1
SYSCTL_PRWTIMER_R1
Wide Timer 1 Peripheral Ready
1
2
SYSCTL_PRWTIMER_R2
Wide Timer 2 Peripheral Ready
2
3
SYSCTL_PRWTIMER_R3
Wide Timer 3 Peripheral Ready
3
4
SYSCTL_PRWTIMER_R4
Wide Timer 4 Peripheral Ready
4
5
SYSCTL_PRWTIMER_R5
Wide Timer 5 Peripheral Ready
5
6
SYSCTLRCC
Run-Mode Clock Configuration
0x60
read-write
n
0x0
0x0
SYSCTL_RCC_ACG
Auto Clock Gating
27
28
SYSCTL_RCC_BYPASS
PLL Bypass
11
12
SYSCTL_RCC_IOSCDIS
Internal Oscillator Disable
1
2
SYSCTL_RCC_MOSCDIS
Main Oscillator Disable
0
1
SYSCTL_RCC_OSCSRC
Oscillator Source
4
6
SYSCTL_RCC_OSCSRC_MAIN
MOSC
0x0
SYSCTL_RCC_OSCSRC_INT
IOSC
0x1
SYSCTL_RCC_OSCSRC_INT4
IOSC/4
0x2
SYSCTL_RCC_OSCSRC_30
30 kHz
0x3
SYSCTL_RCC_PWRDN
PLL Power Down
13
14
SYSCTL_RCC_SYSDIV
System Clock Divisor
23
27
SYSCTL_RCC_USESYSDIV
Enable System Clock Divider
22
23
SYSCTL_RCC_XTAL
Crystal Value
6
11
SYSCTL_RCC_XTAL_10MHZ
10 MHz
0x10
SYSCTL_RCC_XTAL_12MHZ
12 MHz
0x11
SYSCTL_RCC_XTAL_12_2MHZ
12.288 MHz
0x12
SYSCTL_RCC_XTAL_13_5MHZ
13.56 MHz
0x13
SYSCTL_RCC_XTAL_14_3MHZ
14.31818 MHz
0x14
SYSCTL_RCC_XTAL_16MHZ
16 MHz
0x15
SYSCTL_RCC_XTAL_16_3MHZ
16.384 MHz
0x16
SYSCTL_RCC_XTAL_18MHZ
18.0 MHz
0x17
SYSCTL_RCC_XTAL_20MHZ
20.0 MHz
0x18
SYSCTL_RCC_XTAL_24MHZ
24.0 MHz
0x19
SYSCTL_RCC_XTAL_25MHZ
25.0 MHz
0x1a
SYSCTL_RCC_XTAL_4MHZ
4 MHz
0x6
SYSCTL_RCC_XTAL_4_09MHZ
4.096 MHz
0x7
SYSCTL_RCC_XTAL_4_91MHZ
4.9152 MHz
0x8
SYSCTL_RCC_XTAL_5MHZ
5 MHz
0x9
SYSCTL_RCC_XTAL_5_12MHZ
5.12 MHz
0xa
SYSCTL_RCC_XTAL_6MHZ
6 MHz
0xb
SYSCTL_RCC_XTAL_6_14MHZ
6.144 MHz
0xc
SYSCTL_RCC_XTAL_7_37MHZ
7.3728 MHz
0xd
SYSCTL_RCC_XTAL_8MHZ
8 MHz
0xe
SYSCTL_RCC_XTAL_8_19MHZ
8.192 MHz
0xf
SYSCTLRCC2
Run-Mode Clock Configuration 2
0x70
read-write
n
0x0
0x0
SYSCTL_RCC2_BYPASS2
PLL Bypass 2
11
12
SYSCTL_RCC2_DIV400
Divide PLL as 400 MHz vs. 200 MHz
30
31
SYSCTL_RCC2_OSCSRC2
Oscillator Source 2
4
7
SYSCTL_RCC2_OSCSRC2_MO
MOSC
0x0
SYSCTL_RCC2_OSCSRC2_IO
PIOSC
0x1
SYSCTL_RCC2_OSCSRC2_IO4
PIOSC/4
0x2
SYSCTL_RCC2_OSCSRC2_30
30 kHz
0x3
SYSCTL_RCC2_PWRDN2
Power-Down PLL 2
13
14
SYSCTL_RCC2_SYSDIV2
System Clock Divisor 2
23
29
SYSCTL_RCC2_SYSDIV2_2
System clock /2
0x1
SYSCTL_RCC2_SYSDIV2_17
System clock /17
0x10
SYSCTL_RCC2_SYSDIV2_18
System clock /18
0x11
SYSCTL_RCC2_SYSDIV2_19
System clock /19
0x12
SYSCTL_RCC2_SYSDIV2_20
System clock /20
0x13
SYSCTL_RCC2_SYSDIV2_21
System clock /21
0x14
SYSCTL_RCC2_SYSDIV2_22
System clock /22
0x15
SYSCTL_RCC2_SYSDIV2_23
System clock /23
0x16
SYSCTL_RCC2_SYSDIV2_24
System clock /24
0x17
SYSCTL_RCC2_SYSDIV2_25
System clock /25
0x18
SYSCTL_RCC2_SYSDIV2_26
System clock /26
0x19
SYSCTL_RCC2_SYSDIV2_27
System clock /27
0x1a
SYSCTL_RCC2_SYSDIV2_28
System clock /28
0x1b
SYSCTL_RCC2_SYSDIV2_29
System clock /29
0x1c
SYSCTL_RCC2_SYSDIV2_30
System clock /30
0x1d
SYSCTL_RCC2_SYSDIV2_31
System clock /31
0x1e
SYSCTL_RCC2_SYSDIV2_32
System clock /32
0x1f
SYSCTL_RCC2_SYSDIV2_3
System clock /3
0x2
SYSCTL_RCC2_SYSDIV2_33
System clock /33
0x20
SYSCTL_RCC2_SYSDIV2_34
System clock /34
0x21
SYSCTL_RCC2_SYSDIV2_35
System clock /35
0x22
SYSCTL_RCC2_SYSDIV2_36
System clock /36
0x23
SYSCTL_RCC2_SYSDIV2_37
System clock /37
0x24
SYSCTL_RCC2_SYSDIV2_38
System clock /38
0x25
SYSCTL_RCC2_SYSDIV2_39
System clock /39
0x26
SYSCTL_RCC2_SYSDIV2_40
System clock /40
0x27
SYSCTL_RCC2_SYSDIV2_41
System clock /41
0x28
SYSCTL_RCC2_SYSDIV2_42
System clock /42
0x29
SYSCTL_RCC2_SYSDIV2_43
System clock /43
0x2a
SYSCTL_RCC2_SYSDIV2_44
System clock /44
0x2b
SYSCTL_RCC2_SYSDIV2_45
System clock /45
0x2c
SYSCTL_RCC2_SYSDIV2_46
System clock /46
0x2d
SYSCTL_RCC2_SYSDIV2_47
System clock /47
0x2e
SYSCTL_RCC2_SYSDIV2_48
System clock /48
0x2f
SYSCTL_RCC2_SYSDIV2_4
System clock /4
0x3
SYSCTL_RCC2_SYSDIV2_49
System clock /49
0x30
SYSCTL_RCC2_SYSDIV2_50
System clock /50
0x31
SYSCTL_RCC2_SYSDIV2_51
System clock /51
0x32
SYSCTL_RCC2_SYSDIV2_52
System clock /52
0x33
SYSCTL_RCC2_SYSDIV2_53
System clock /53
0x34
SYSCTL_RCC2_SYSDIV2_54
System clock /54
0x35
SYSCTL_RCC2_SYSDIV2_55
System clock /55
0x36
SYSCTL_RCC2_SYSDIV2_56
System clock /56
0x37
SYSCTL_RCC2_SYSDIV2_57
System clock /57
0x38
SYSCTL_RCC2_SYSDIV2_58
System clock /58
0x39
SYSCTL_RCC2_SYSDIV2_59
System clock /59
0x3a
SYSCTL_RCC2_SYSDIV2_60
System clock /60
0x3b
SYSCTL_RCC2_SYSDIV2_61
System clock /61
0x3c
SYSCTL_RCC2_SYSDIV2_62
System clock /62
0x3d
SYSCTL_RCC2_SYSDIV2_63
System clock /63
0x3e
SYSCTL_RCC2_SYSDIV2_64
System clock /64
0x3f
SYSCTL_RCC2_SYSDIV2_5
System clock /5
0x4
SYSCTL_RCC2_SYSDIV2_6
System clock /6
0x5
SYSCTL_RCC2_SYSDIV2_7
System clock /7
0x6
SYSCTL_RCC2_SYSDIV2_8
System clock /8
0x7
SYSCTL_RCC2_SYSDIV2_9
System clock /9
0x8
SYSCTL_RCC2_SYSDIV2_10
System clock /10
0x9
SYSCTL_RCC2_SYSDIV2_11
System clock /11
0xa
SYSCTL_RCC2_SYSDIV2_12
System clock /12
0xb
SYSCTL_RCC2_SYSDIV2_13
System clock /13
0xc
SYSCTL_RCC2_SYSDIV2_14
System clock /14
0xd
SYSCTL_RCC2_SYSDIV2_15
System clock /15
0xe
SYSCTL_RCC2_SYSDIV2_16
System clock /16
0xf
SYSCTL_RCC2_SYSDIV2LSB
Additional LSB for SYSDIV2
22
23
SYSCTL_RCC2_USBPWRDN
Power-Down USB PLL
14
15
SYSCTL_RCC2_USERCC2
Use RCC2
31
32
SYSCTLRCGC0
Run Mode Clock Gating Control Register 0
0x100
read-write
n
0x0
0x0
SYSCTL_RCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_RCGC0_ADC0SPD
ADC0 Sample Speed
8
10
SYSCTL_RCGC0_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_RCGC0_ADC1SPD
ADC1 Sample Speed
10
12
SYSCTL_RCGC0_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_RCGC0_CAN1
CAN1 Clock Gating Control
25
26
SYSCTL_RCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_RCGC0_PWM0
PWM Clock Gating Control
20
21
SYSCTL_RCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_RCGC0_WDT1
WDT1 Clock Gating Control
28
29
SYSCTLRCGC1
Run Mode Clock Gating Control Register 1
0x104
read-write
n
0x0
0x0
SYSCTL_RCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_RCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_RCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_RCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_RCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_RCGC1_QEI0
QEI0 Clock Gating Control
8
9
SYSCTL_RCGC1_QEI1
QEI1 Clock Gating Control
9
10
SYSCTL_RCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_RCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_RCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_RCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_RCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_RCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_RCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_RCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_RCGC1_UART2
UART2 Clock Gating Control
2
3
SYSCTLRCGC2
Run Mode Clock Gating Control Register 2
0x108
read-write
n
0x0
0x0
SYSCTL_RCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_RCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_RCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_RCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_RCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_RCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_RCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_RCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_RCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_RCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTL_RCGC2_USB0
USB0 Clock Gating Control
16
17
SYSCTLRCGCACMP
Analog Comparator Run Mode Clock Gating Control
0x63C
read-write
n
0x0
0x0
SYSCTL_RCGCACMP_R0
Analog Comparator Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCADC
Analog-to-Digital Converter Run Mode Clock Gating Control
0x638
read-write
n
0x0
0x0
SYSCTL_RCGCADC_R0
ADC Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCADC_R1
ADC Module 1 Run Mode Clock Gating Control
1
2
SYSCTLRCGCCAN
Controller Area Network Run Mode Clock Gating Control
0x634
read-write
n
0x0
0x0
SYSCTL_RCGCCAN_R0
CAN Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCCAN_R1
CAN Module 1 Run Mode Clock Gating Control
1
2
SYSCTLRCGCDMA
Micro Direct Memory Access Run Mode Clock Gating Control
0x60C
read-write
n
0x0
0x0
SYSCTL_RCGCDMA_R0
uDMA Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCEEPROM
EEPROM Run Mode Clock Gating Control
0x658
read-write
n
0x0
0x0
SYSCTL_RCGCEEPROM_R0
EEPROM Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCGPIO
General-Purpose Input/Output Run Mode Clock Gating Control
0x608
read-write
n
0x0
0x0
SYSCTL_RCGCGPIO_R0
GPIO Port A Run Mode Clock Gating Control
0
1
SYSCTL_RCGCGPIO_R1
GPIO Port B Run Mode Clock Gating Control
1
2
SYSCTL_RCGCGPIO_R10
GPIO Port L Run Mode Clock Gating Control
10
11
SYSCTL_RCGCGPIO_R11
GPIO Port M Run Mode Clock Gating Control
11
12
SYSCTL_RCGCGPIO_R12
GPIO Port N Run Mode Clock Gating Control
12
13
SYSCTL_RCGCGPIO_R13
GPIO Port P Run Mode Clock Gating Control
13
14
SYSCTL_RCGCGPIO_R14
GPIO Port Q Run Mode Clock Gating Control
14
15
SYSCTL_RCGCGPIO_R2
GPIO Port C Run Mode Clock Gating Control
2
3
SYSCTL_RCGCGPIO_R3
GPIO Port D Run Mode Clock Gating Control
3
4
SYSCTL_RCGCGPIO_R4
GPIO Port E Run Mode Clock Gating Control
4
5
SYSCTL_RCGCGPIO_R5
GPIO Port F Run Mode Clock Gating Control
5
6
SYSCTL_RCGCGPIO_R6
GPIO Port G Run Mode Clock Gating Control
6
7
SYSCTL_RCGCGPIO_R7
GPIO Port H Run Mode Clock Gating Control
7
8
SYSCTL_RCGCGPIO_R8
GPIO Port J Run Mode Clock Gating Control
8
9
SYSCTL_RCGCGPIO_R9
GPIO Port K Run Mode Clock Gating Control
9
10
SYSCTLRCGCI2C
Inter-Integrated Circuit Run Mode Clock Gating Control
0x620
read-write
n
0x0
0x0
SYSCTL_RCGCI2C_R0
I2C Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCI2C_R1
I2C Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCI2C_R2
I2C Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCI2C_R3
I2C Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCI2C_R4
I2C Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCI2C_R5
I2C Module 5 Run Mode Clock Gating Control
5
6
SYSCTLRCGCSSI
Synchronous Serial Interface Run Mode Clock Gating Control
0x61C
read-write
n
0x0
0x0
SYSCTL_RCGCSSI_R0
SSI Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCSSI_R1
SSI Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCSSI_R2
SSI Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCSSI_R3
SSI Module 3 Run Mode Clock Gating Control
3
4
SYSCTLRCGCTIMER
Timer Run Mode Clock Gating Control
0x604
read-write
n
0x0
0x0
SYSCTL_RCGCTIMER_R0
Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCTIMER_R1
Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCTIMER_R2
Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCTIMER_R3
Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCTIMER_R4
Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCTIMER_R5
Timer 5 Run Mode Clock Gating Control
5
6
SYSCTLRCGCUART
Universal Asynchronous Receiver/Transmitter Run Mode Clock Gating Control
0x618
read-write
n
0x0
0x0
SYSCTL_RCGCUART_R0
UART Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCUART_R1
UART Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCUART_R2
UART Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCUART_R3
UART Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCUART_R4
UART Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCUART_R5
UART Module 5 Run Mode Clock Gating Control
5
6
SYSCTL_RCGCUART_R6
UART Module 6 Run Mode Clock Gating Control
6
7
SYSCTL_RCGCUART_R7
UART Module 7 Run Mode Clock Gating Control
7
8
SYSCTLRCGCUSB
Universal Serial Bus Run Mode Clock Gating Control
0x628
read-write
n
0x0
0x0
SYSCTL_RCGCUSB_R0
USB Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCWD
Watchdog Timer Run Mode Clock Gating Control
0x600
read-write
n
0x0
0x0
SYSCTL_RCGCWD_R0
Watchdog Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWD_R1
Watchdog Timer 1 Run Mode Clock Gating Control
1
2
SYSCTLRCGCWTIMER
Wide Timer Run Mode Clock Gating Control
0x65C
read-write
n
0x0
0x0
SYSCTL_RCGCWTIMER_R0
Wide Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWTIMER_R1
Wide Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCWTIMER_R2
Wide Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCWTIMER_R3
Wide Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCWTIMER_R4
Wide Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCWTIMER_R5
Wide Timer 5 Run Mode Clock Gating Control
5
6
SYSCTLRESC
Reset Cause
0x5C
read-write
n
0x0
0x0
SYSCTL_RESC_BOR
Brown-Out Reset
2
3
SYSCTL_RESC_EXT
External Reset
0
1
SYSCTL_RESC_MOSCFAIL
MOSC Failure Reset
16
17
SYSCTL_RESC_POR
Power-On Reset
1
2
SYSCTL_RESC_SW
Software Reset
4
5
SYSCTL_RESC_WDT0
Watchdog Timer 0 Reset
3
4
SYSCTL_RESC_WDT1
Watchdog Timer 1 Reset
5
6
SYSCTLRIS
Raw Interrupt Status
0x50
read-write
n
0x0
0x0
SYSCTL_RIS_BORRIS
Brown-Out Reset Raw Interrupt Status
1
2
SYSCTL_RIS_MOFRIS
Main Oscillator Fault Raw Interrupt Status
3
4
SYSCTL_RIS_MOSCPUPRIS
MOSC Power Up Raw Interrupt Status
8
9
SYSCTL_RIS_PLLLRIS
PLL Lock Raw Interrupt Status
6
7
SYSCTL_RIS_USBPLLLRIS
USB PLL Lock Raw Interrupt Status
7
8
SYSCTLSCGC0
Sleep Mode Clock Gating Control Register 0
0x110
read-write
n
0x0
0x0
SYSCTL_SCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_SCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_SCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_SCGC0_CAN1
CAN1 Clock Gating Control
25
26
SYSCTL_SCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_SCGC0_PWM0
PWM Clock Gating Control
20
21
SYSCTL_SCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_SCGC0_WDT1
WDT1 Clock Gating Control
28
29
SYSCTLSCGC1
Sleep Mode Clock Gating Control Register 1
0x114
read-write
n
0x0
0x0
SYSCTL_SCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_SCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_SCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_SCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_SCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_SCGC1_QEI0
QEI0 Clock Gating Control
8
9
SYSCTL_SCGC1_QEI1
QEI1 Clock Gating Control
9
10
SYSCTL_SCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_SCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_SCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_SCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_SCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_SCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_SCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_SCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_SCGC1_UART2
UART2 Clock Gating Control
2
3
SYSCTLSCGC2
Sleep Mode Clock Gating Control Register 2
0x118
read-write
n
0x0
0x0
SYSCTL_SCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_SCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_SCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_SCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_SCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_SCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_SCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_SCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_SCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_SCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTL_SCGC2_USB0
USB0 Clock Gating Control
16
17
SYSCTLSCGCACMP
Analog Comparator Sleep Mode Clock Gating Control
0x73C
read-write
n
0x0
0x0
SYSCTL_SCGCACMP_S0
Analog Comparator Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCADC
Analog-to-Digital Converter Sleep Mode Clock Gating Control
0x738
read-write
n
0x0
0x0
SYSCTL_SCGCADC_S0
ADC Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCADC_S1
ADC Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTLSCGCCAN
Controller Area Network Sleep Mode Clock Gating Control
0x734
read-write
n
0x0
0x0
SYSCTL_SCGCCAN_S0
CAN Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCCAN_S1
CAN Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTLSCGCDMA
Micro Direct Memory Access Sleep Mode Clock Gating Control
0x70C
read-write
n
0x0
0x0
SYSCTL_SCGCDMA_S0
uDMA Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCEEPROM
EEPROM Sleep Mode Clock Gating Control
0x758
read-write
n
0x0
0x0
SYSCTL_SCGCEEPROM_S0
EEPROM Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCGPIO
General-Purpose Input/Output Sleep Mode Clock Gating Control
0x708
read-write
n
0x0
0x0
SYSCTL_SCGCGPIO_S0
GPIO Port A Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCGPIO_S1
GPIO Port B Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCGPIO_S10
GPIO Port L Sleep Mode Clock Gating Control
10
11
SYSCTL_SCGCGPIO_S11
GPIO Port M Sleep Mode Clock Gating Control
11
12
SYSCTL_SCGCGPIO_S12
GPIO Port N Sleep Mode Clock Gating Control
12
13
SYSCTL_SCGCGPIO_S13
GPIO Port P Sleep Mode Clock Gating Control
13
14
SYSCTL_SCGCGPIO_S14
GPIO Port Q Sleep Mode Clock Gating Control
14
15
SYSCTL_SCGCGPIO_S2
GPIO Port C Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCGPIO_S3
GPIO Port D Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCGPIO_S4
GPIO Port E Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCGPIO_S5
GPIO Port F Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCGPIO_S6
GPIO Port G Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCGPIO_S7
GPIO Port H Sleep Mode Clock Gating Control
7
8
SYSCTL_SCGCGPIO_S8
GPIO Port J Sleep Mode Clock Gating Control
8
9
SYSCTL_SCGCGPIO_S9
GPIO Port K Sleep Mode Clock Gating Control
9
10
SYSCTLSCGCI2C
Inter-Integrated Circuit Sleep Mode Clock Gating Control
0x720
read-write
n
0x0
0x0
SYSCTL_SCGCI2C_S0
I2C Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCI2C_S1
I2C Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCI2C_S2
I2C Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCI2C_S3
I2C Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCI2C_S4
I2C Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCI2C_S5
I2C Module 5 Sleep Mode Clock Gating Control
5
6
SYSCTLSCGCSSI
Synchronous Serial Interface Sleep Mode Clock Gating Control
0x71C
read-write
n
0x0
0x0
SYSCTL_SCGCSSI_S0
SSI Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCSSI_S1
SSI Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCSSI_S2
SSI Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCSSI_S3
SSI Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTLSCGCTIMER
Timer Sleep Mode Clock Gating Control
0x704
read-write
n
0x0
0x0
SYSCTL_SCGCTIMER_S0
Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCTIMER_S1
Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCTIMER_S2
Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCTIMER_S3
Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCTIMER_S4
Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCTIMER_S5
Timer 5 Sleep Mode Clock Gating Control
5
6
SYSCTLSCGCUART
Universal Asynchronous Receiver/Transmitter Sleep Mode Clock Gating Control
0x718
read-write
n
0x0
0x0
SYSCTL_SCGCUART_S0
UART Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCUART_S1
UART Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCUART_S2
UART Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCUART_S3
UART Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCUART_S4
UART Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCUART_S5
UART Module 5 Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCUART_S6
UART Module 6 Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCUART_S7
UART Module 7 Sleep Mode Clock Gating Control
7
8
SYSCTLSCGCUSB
Universal Serial Bus Sleep Mode Clock Gating Control
0x728
read-write
n
0x0
0x0
SYSCTL_SCGCUSB_S0
USB Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCWD
Watchdog Timer Sleep Mode Clock Gating Control
0x700
read-write
n
0x0
0x0
SYSCTL_SCGCWD_S0
Watchdog Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWD_S1
Watchdog Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTLSCGCWTIMER
Wide Timer Sleep Mode Clock Gating Control
0x75C
read-write
n
0x0
0x0
SYSCTL_SCGCWTIMER_S0
Wide Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWTIMER_S1
Wide Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCWTIMER_S2
Wide Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCWTIMER_S3
Wide Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCWTIMER_S4
Wide Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCWTIMER_S5
Wide Timer 5 Sleep Mode Clock Gating Control
5
6
SYSCTLSRACMP
Analog Comparator Software Reset
0x53C
read-write
n
0x0
0x0
SYSCTL_SRACMP_R0
Analog Comparator Module Software Reset
0
1
SYSCTLSRADC
Analog-to-Digital Converter Software Reset
0x538
read-write
n
0x0
0x0
SYSCTL_SRADC_R0
ADC Module 0 Software Reset
0
1
SYSCTL_SRADC_R1
ADC Module 1 Software Reset
1
2
SYSCTLSRCAN
Controller Area Network Software Reset
0x534
read-write
n
0x0
0x0
SYSCTL_SRCAN_R0
CAN Module 0 Software Reset
0
1
SYSCTL_SRCAN_R1
CAN Module 1 Software Reset
1
2
SYSCTLSRCR0
Software Reset Control 0
0x40
read-write
n
0x0
0x0
SYSCTL_SRCR0_ADC0
ADC0 Reset Control
16
17
SYSCTL_SRCR0_ADC1
ADC1 Reset Control
17
18
SYSCTL_SRCR0_CAN0
CAN0 Reset Control
24
25
SYSCTL_SRCR0_CAN1
CAN1 Reset Control
25
26
SYSCTL_SRCR0_HIB
HIB Reset Control
6
7
SYSCTL_SRCR0_PWM0
PWM Reset Control
20
21
SYSCTL_SRCR0_WDT0
WDT0 Reset Control
3
4
SYSCTL_SRCR0_WDT1
WDT1 Reset Control
28
29
SYSCTLSRCR1
Software Reset Control 1
0x44
read-write
n
0x0
0x0
SYSCTL_SRCR1_COMP0
Analog Comp 0 Reset Control
24
25
SYSCTL_SRCR1_COMP1
Analog Comp 1 Reset Control
25
26
SYSCTL_SRCR1_COMP2
Analog Comp 2 Reset Control
26
27
SYSCTL_SRCR1_I2C0
I2C0 Reset Control
12
13
SYSCTL_SRCR1_I2C1
I2C1 Reset Control
14
15
SYSCTL_SRCR1_QEI0
QEI0 Reset Control
8
9
SYSCTL_SRCR1_QEI1
QEI1 Reset Control
9
10
SYSCTL_SRCR1_SSI0
SSI0 Reset Control
4
5
SYSCTL_SRCR1_SSI1
SSI1 Reset Control
5
6
SYSCTL_SRCR1_TIMER0
Timer 0 Reset Control
16
17
SYSCTL_SRCR1_TIMER1
Timer 1 Reset Control
17
18
SYSCTL_SRCR1_TIMER2
Timer 2 Reset Control
18
19
SYSCTL_SRCR1_TIMER3
Timer 3 Reset Control
19
20
SYSCTL_SRCR1_UART0
UART0 Reset Control
0
1
SYSCTL_SRCR1_UART1
UART1 Reset Control
1
2
SYSCTL_SRCR1_UART2
UART2 Reset Control
2
3
SYSCTLSRCR2
Software Reset Control 2
0x48
read-write
n
0x0
0x0
SYSCTL_SRCR2_GPIOA
Port A Reset Control
0
1
SYSCTL_SRCR2_GPIOB
Port B Reset Control
1
2
SYSCTL_SRCR2_GPIOC
Port C Reset Control
2
3
SYSCTL_SRCR2_GPIOD
Port D Reset Control
3
4
SYSCTL_SRCR2_GPIOE
Port E Reset Control
4
5
SYSCTL_SRCR2_GPIOF
Port F Reset Control
5
6
SYSCTL_SRCR2_GPIOG
Port G Reset Control
6
7
SYSCTL_SRCR2_GPIOH
Port H Reset Control
7
8
SYSCTL_SRCR2_GPIOJ
Port J Reset Control
8
9
SYSCTL_SRCR2_UDMA
Micro-DMA Reset Control
13
14
SYSCTL_SRCR2_USB0
USB0 Reset Control
16
17
SYSCTLSRDMA
Micro Direct Memory Access Software Reset
0x50C
read-write
n
0x0
0x0
SYSCTL_SRDMA_R0
uDMA Module Software Reset
0
1
SYSCTLSREEPROM
EEPROM Software Reset
0x558
read-write
n
0x0
0x0
SYSCTL_SREEPROM_R0
EEPROM Module Software Reset
0
1
SYSCTLSRGPIO
General-Purpose Input/Output Software Reset
0x508
read-write
n
0x0
0x0
SYSCTL_SRGPIO_R0
GPIO Port A Software Reset
0
1
SYSCTL_SRGPIO_R1
GPIO Port B Software Reset
1
2
SYSCTL_SRGPIO_R10
GPIO Port L Software Reset
10
11
SYSCTL_SRGPIO_R11
GPIO Port M Software Reset
11
12
SYSCTL_SRGPIO_R12
GPIO Port N Software Reset
12
13
SYSCTL_SRGPIO_R13
GPIO Port P Software Reset
13
14
SYSCTL_SRGPIO_R14
GPIO Port Q Software Reset
14
15
SYSCTL_SRGPIO_R2
GPIO Port C Software Reset
2
3
SYSCTL_SRGPIO_R3
GPIO Port D Software Reset
3
4
SYSCTL_SRGPIO_R4
GPIO Port E Software Reset
4
5
SYSCTL_SRGPIO_R5
GPIO Port F Software Reset
5
6
SYSCTL_SRGPIO_R6
GPIO Port G Software Reset
6
7
SYSCTL_SRGPIO_R7
GPIO Port H Software Reset
7
8
SYSCTL_SRGPIO_R8
GPIO Port J Software Reset
8
9
SYSCTL_SRGPIO_R9
GPIO Port K Software Reset
9
10
SYSCTLSRI2C
Inter-Integrated Circuit Software Reset
0x520
read-write
n
0x0
0x0
SYSCTL_SRI2C_R0
I2C Module 0 Software Reset
0
1
SYSCTL_SRI2C_R1
I2C Module 1 Software Reset
1
2
SYSCTL_SRI2C_R2
I2C Module 2 Software Reset
2
3
SYSCTL_SRI2C_R3
I2C Module 3 Software Reset
3
4
SYSCTL_SRI2C_R4
I2C Module 4 Software Reset
4
5
SYSCTL_SRI2C_R5
I2C Module 5 Software Reset
5
6
SYSCTLSRSSI
Synchronous Serial Interface Software Reset
0x51C
read-write
n
0x0
0x0
SYSCTL_SRSSI_R0
SSI Module 0 Software Reset
0
1
SYSCTL_SRSSI_R1
SSI Module 1 Software Reset
1
2
SYSCTL_SRSSI_R2
SSI Module 2 Software Reset
2
3
SYSCTL_SRSSI_R3
SSI Module 3 Software Reset
3
4
SYSCTLSRTIMER
Timer Software Reset
0x504
read-write
n
0x0
0x0
SYSCTL_SRTIMER_R0
Timer 0 Software Reset
0
1
SYSCTL_SRTIMER_R1
Timer 1 Software Reset
1
2
SYSCTL_SRTIMER_R2
Timer 2 Software Reset
2
3
SYSCTL_SRTIMER_R3
Timer 3 Software Reset
3
4
SYSCTL_SRTIMER_R4
Timer 4 Software Reset
4
5
SYSCTL_SRTIMER_R5
Timer 5 Software Reset
5
6
SYSCTLSRUART
Universal Asynchronous Receiver/Transmitter Software Reset
0x518
read-write
n
0x0
0x0
SYSCTL_SRUART_R0
UART Module 0 Software Reset
0
1
SYSCTL_SRUART_R1
UART Module 1 Software Reset
1
2
SYSCTL_SRUART_R2
UART Module 2 Software Reset
2
3
SYSCTL_SRUART_R3
UART Module 3 Software Reset
3
4
SYSCTL_SRUART_R4
UART Module 4 Software Reset
4
5
SYSCTL_SRUART_R5
UART Module 5 Software Reset
5
6
SYSCTL_SRUART_R6
UART Module 6 Software Reset
6
7
SYSCTL_SRUART_R7
UART Module 7 Software Reset
7
8
SYSCTLSRUSB
Universal Serial Bus Software Reset
0x528
read-write
n
0x0
0x0
SYSCTL_SRUSB_R0
USB Module Software Reset
0
1
SYSCTLSRWD
Watchdog Timer Software Reset
0x500
read-write
n
0x0
0x0
SYSCTL_SRWD_R0
Watchdog Timer 0 Software Reset
0
1
SYSCTL_SRWD_R1
Watchdog Timer 1 Software Reset
1
2
SYSCTLSRWTIMER
Wide Timer Software Reset
0x55C
read-write
n
0x0
0x0
SYSCTL_SRWTIMER_R0
Wide Timer 0 Software Reset
0
1
SYSCTL_SRWTIMER_R1
Wide Timer 1 Software Reset
1
2
SYSCTL_SRWTIMER_R2
Wide Timer 2 Software Reset
2
3
SYSCTL_SRWTIMER_R3
Wide Timer 3 Software Reset
3
4
SYSCTL_SRWTIMER_R4
Wide Timer 4 Software Reset
4
5
SYSCTL_SRWTIMER_R5
Wide Timer 5 Software Reset
5
6
SYSCTLSYSPROP
System Properties
0x14C
read-write
n
0x0
0x0
SYSCTL_SYSPROP_FPU
FPU Present
0
1
SYSPROP
System Properties
0x14C
-1
read-write
n
0x0
0x0
SYSCTL_SYSPROP_FPU
FPU Present
0
1
SYSEXC
Register map for SYSEXC peripheral
SYSEXC
0x0
0x0
0x1000
registers
n
IC
System Exception Interrupt Clear
0xC
-1
write-only
n
0x0
0x0
SYSEXC_IC_DZCIC
Divide By 0 Exception Flag
1
2
write-only
SYSEXC_IC_IDCIC
Input Denormal Exception Flag
0
1
write-only
SYSEXC_IC_IOCIC
Invalid Operation Flag
2
3
write-only
SYSEXC_IC_IXCIC
Inexact Exception Flag
5
6
write-only
SYSEXC_IC_OFCIC
Overflow Exception Flag
4
5
write-only
SYSEXC_IC_UFCIC
Underflow Exception Flag
3
4
write-only
IM
System Exception Interrupt Mask
0x4
-1
read-write
n
0x0
0x0
SYSEXC_IM_DZCIM
Divide By 0 Exception Flag
1
2
SYSEXC_IM_IDCIM
Input Denormal Exception Flag
0
1
SYSEXC_IM_IOCIM
Invalid Operation Flag
2
3
SYSEXC_IM_IXCIM
Inexact Exception Flag
5
6
SYSEXC_IM_OFCIM
Overflow Exception Flag
4
5
SYSEXC_IM_UFCIM
Underflow Exception Flag
3
4
MIS
System Exception Raw Interrupt Status
0x8
-1
read-write
n
0x0
0x0
SYSEXC_MIS_DZCMIS
Divide By 0 Exception Flag
1
2
SYSEXC_MIS_IDCMIS
Input Denormal Exception Flag
0
1
SYSEXC_MIS_IOCMIS
Invalid Operation Flag
2
3
SYSEXC_MIS_IXCMIS
Inexact Exception Flag
5
6
SYSEXC_MIS_OFCMIS
Overflow Exception Flag
4
5
SYSEXC_MIS_UFCMIS
Underflow Exception Flag
3
4
RIS
System Exception Raw Interrupt Status
0x0
-1
read-write
n
0x0
0x0
SYSEXC_RIS_DZCRIS
Divide By 0 Exception Flag
1
2
SYSEXC_RIS_IDCRIS
Input Denormal Exception Flag
0
1
SYSEXC_RIS_IOCRIS
Invalid Operation Flag
2
3
SYSEXC_RIS_IXCRIS
Inexact Exception Flag
5
6
SYSEXC_RIS_OFCRIS
Overflow Exception Flag
4
5
SYSEXC_RIS_UFCRIS
Underflow Exception Flag
3
4
SYSEXCIC
System Exception Interrupt Clear
0xC
write-only
n
0x0
0x0
SYSEXC_IC_DZCIC
Divide By 0 Exception Flag
1
2
write-only
SYSEXC_IC_IDCIC
Input Denormal Exception Flag
0
1
write-only
SYSEXC_IC_IOCIC
Invalid Operation Flag
2
3
write-only
SYSEXC_IC_IXCIC
Inexact Exception Flag
5
6
write-only
SYSEXC_IC_OFCIC
Overflow Exception Flag
4
5
write-only
SYSEXC_IC_UFCIC
Underflow Exception Flag
3
4
write-only
SYSEXCIM
System Exception Interrupt Mask
0x4
read-write
n
0x0
0x0
SYSEXC_IM_DZCIM
Divide By 0 Exception Flag
1
2
SYSEXC_IM_IDCIM
Input Denormal Exception Flag
0
1
SYSEXC_IM_IOCIM
Invalid Operation Flag
2
3
SYSEXC_IM_IXCIM
Inexact Exception Flag
5
6
SYSEXC_IM_OFCIM
Overflow Exception Flag
4
5
SYSEXC_IM_UFCIM
Underflow Exception Flag
3
4
SYSEXCMIS
System Exception Raw Interrupt Status
0x8
read-write
n
0x0
0x0
SYSEXC_MIS_DZCMIS
Divide By 0 Exception Flag
1
2
SYSEXC_MIS_IDCMIS
Input Denormal Exception Flag
0
1
SYSEXC_MIS_IOCMIS
Invalid Operation Flag
2
3
SYSEXC_MIS_IXCMIS
Inexact Exception Flag
5
6
SYSEXC_MIS_OFCMIS
Overflow Exception Flag
4
5
SYSEXC_MIS_UFCMIS
Underflow Exception Flag
3
4
SYSEXCRIS
System Exception Raw Interrupt Status
0x0
read-write
n
0x0
0x0
SYSEXC_RIS_DZCRIS
Divide By 0 Exception Flag
1
2
SYSEXC_RIS_IDCRIS
Input Denormal Exception Flag
0
1
SYSEXC_RIS_IOCRIS
Invalid Operation Flag
2
3
SYSEXC_RIS_IXCRIS
Inexact Exception Flag
5
6
SYSEXC_RIS_OFCRIS
Overflow Exception Flag
4
5
SYSEXC_RIS_UFCRIS
Underflow Exception Flag
3
4
TIMER0
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER1
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER2
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER3
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER4
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER5
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
UART0
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART1
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART2
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART3
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART4
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART5
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART6
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UART7
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
LCTL
UART LIN Control
0x90
-1
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
LSS
UART LIN Snap Shot
0x94
-1
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
LTIM
UART LIN Timer
0x98
-1
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
The system clock (default)
0x0
UART_CC_CS_PIOSC
PIOSC
0x1
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_LIN
LIN Mode Enable
6
7
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_LME1IC
LIN Mode Edge 1 Interrupt Clear
14
15
write-only
UART_ICR_LME5IC
LIN Mode Edge 5 Interrupt Clear
15
16
write-only
UART_ICR_LMSBIC
LIN Mode Sync Break Interrupt Clear
13
14
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_LME1IM
LIN Mode Edge 1 Interrupt Mask
14
15
UART_IM_LME5IM
LIN Mode Edge 5 Interrupt Mask
15
16
UART_IM_LMSBIM
LIN Mode Sync Break Interrupt Mask
13
14
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0LCTL
UART LIN Control
0x90
read-write
n
0x0
0x0
UART_LCTL_BLEN
Sync Break Length
4
6
UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x0
UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x1
UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x2
UART_LCTL_BLEN_16T
Sync break length is 16T bits
0x3
UART_LCTL_MASTER
LIN Master Enable
0
1
UART0LSS
UART LIN Snap Shot
0x94
read-write
n
0x0
0x0
UART_LSS_TSS
Timer Snap Shot
0
16
UART0LTIM
UART LIN Timer
0x98
read-write
n
0x0
0x0
UART_LTIM_TIMER
Timer Value
0
16
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_LME1MIS
LIN Mode Edge 1 Masked Interrupt Status
14
15
UART_MIS_LME5MIS
LIN Mode Edge 5 Masked Interrupt Status
15
16
UART_MIS_LMSBMIS
LIN Mode Sync Break Masked Interrupt Status
13
14
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_LME1RIS
LIN Mode Edge 1 Raw Interrupt Status
14
15
UART_RIS_LME5RIS
LIN Mode Edge 5 Raw Interrupt Status
15
16
UART_RIS_LMSBRIS
LIN Mode Sync Break Raw Interrupt Status
13
14
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART_9BITAMASK_RANGE
Self Address Range for 9-Bit Mode
8
16
UDMA
Register map for UDMA peripheral
UDM
0x0
0x0
0x1000
registers
n
ALTBASE
DMA Alternate Channel Control Base Pointer
0xC
-1
read-write
n
0x0
0x0
UDMA_ALTBASE_ADDR
Alternate Channel Address Pointer
0
32
ALTCLR
DMA Channel Primary Alternate Clear
0x34
-1
write-only
n
0x0
0x0
UDMA_ALTCLR_CLR
Channel [n] Alternate Clear
0
32
write-only
ALTSET
DMA Channel Primary Alternate Set
0x30
-1
read-write
n
0x0
0x0
UDMA_ALTSET_SET
Channel [n] Alternate Set
0
32
CFG
DMA Configuration
0x4
-1
write-only
n
0x0
0x0
UDMA_CFG_MASTEN
Controller Master Enable
0
1
write-only
CHASGN
DMA Channel Assignment
0x500
-1
read-write
n
0x0
0x0
UDMA_CHASGN
Channel [n] Assignment Select
0
32
UDMA_CHASGN_PRIMARY
Use the primary channel assignment
0x0
UDMA_CHASGN_SECONDARY
Use the secondary channel assignment
0x1
CHIS
DMA Channel Interrupt Status
0x504
-1
read-write
n
0x0
0x0
UDMA_CHIS
Channel [n] Interrupt Status
0
32
CHMAP0
DMA Channel Map Select 0
0x510
-1
read-write
n
0x0
0x0
UDMA_CHMAP0_CH0SEL
uDMA Channel 0 Source Select
0
4
UDMA_CHMAP0_CH1SEL
uDMA Channel 1 Source Select
4
8
UDMA_CHMAP0_CH2SEL
uDMA Channel 2 Source Select
8
12
UDMA_CHMAP0_CH3SEL
uDMA Channel 3 Source Select
12
16
UDMA_CHMAP0_CH4SEL
uDMA Channel 4 Source Select
16
20
UDMA_CHMAP0_CH5SEL
uDMA Channel 5 Source Select
20
24
UDMA_CHMAP0_CH6SEL
uDMA Channel 6 Source Select
24
28
UDMA_CHMAP0_CH7SEL
uDMA Channel 7 Source Select
28
32
CHMAP1
DMA Channel Map Select 1
0x514
-1
read-write
n
0x0
0x0
UDMA_CHMAP1_CH10SEL
uDMA Channel 10 Source Select
8
12
UDMA_CHMAP1_CH11SEL
uDMA Channel 11 Source Select
12
16
UDMA_CHMAP1_CH12SEL
uDMA Channel 12 Source Select
16
20
UDMA_CHMAP1_CH13SEL
uDMA Channel 13 Source Select
20
24
UDMA_CHMAP1_CH14SEL
uDMA Channel 14 Source Select
24
28
UDMA_CHMAP1_CH15SEL
uDMA Channel 15 Source Select
28
32
UDMA_CHMAP1_CH8SEL
uDMA Channel 8 Source Select
0
4
UDMA_CHMAP1_CH9SEL
uDMA Channel 9 Source Select
4
8
CHMAP2
DMA Channel Map Select 2
0x518
-1
read-write
n
0x0
0x0
UDMA_CHMAP2_CH16SEL
uDMA Channel 16 Source Select
0
4
UDMA_CHMAP2_CH17SEL
uDMA Channel 17 Source Select
4
8
UDMA_CHMAP2_CH18SEL
uDMA Channel 18 Source Select
8
12
UDMA_CHMAP2_CH19SEL
uDMA Channel 19 Source Select
12
16
UDMA_CHMAP2_CH20SEL
uDMA Channel 20 Source Select
16
20
UDMA_CHMAP2_CH21SEL
uDMA Channel 21 Source Select
20
24
UDMA_CHMAP2_CH22SEL
uDMA Channel 22 Source Select
24
28
UDMA_CHMAP2_CH23SEL
uDMA Channel 23 Source Select
28
32
CHMAP3
DMA Channel Map Select 3
0x51C
-1
read-write
n
0x0
0x0
UDMA_CHMAP3_CH24SEL
uDMA Channel 24 Source Select
0
4
UDMA_CHMAP3_CH25SEL
uDMA Channel 25 Source Select
4
8
UDMA_CHMAP3_CH26SEL
uDMA Channel 26 Source Select
8
12
UDMA_CHMAP3_CH27SEL
uDMA Channel 27 Source Select
12
16
UDMA_CHMAP3_CH28SEL
uDMA Channel 28 Source Select
16
20
UDMA_CHMAP3_CH29SEL
uDMA Channel 29 Source Select
20
24
UDMA_CHMAP3_CH30SEL
uDMA Channel 30 Source Select
24
28
UDMA_CHMAP3_CH31SEL
uDMA Channel 31 Source Select
28
32
CTLBASE
DMA Channel Control Base Pointer
0x8
-1
read-write
n
0x0
0x0
UDMA_CTLBASE_ADDR
Channel Control Base Address
10
32
ENACLR
DMA Channel Enable Clear
0x2C
-1
write-only
n
0x0
0x0
UDMA_ENACLR_CLR
Clear Channel [n] Enable Clear
0
32
write-only
ENASET
DMA Channel Enable Set
0x28
-1
read-write
n
0x0
0x0
UDMA_ENASET_SET
Channel [n] Enable Set
0
32
ERRCLR
DMA Bus Error Clear
0x4C
-1
read-write
n
0x0
0x0
UDMA_ERRCLR_ERRCLR
uDMA Bus Error Status
0
1
PRIOCLR
DMA Channel Priority Clear
0x3C
-1
write-only
n
0x0
0x0
UDMA_PRIOCLR_CLR
Channel [n] Priority Clear
0
32
write-only
PRIOSET
DMA Channel Priority Set
0x38
-1
read-write
n
0x0
0x0
UDMA_PRIOSET_SET
Channel [n] Priority Set
0
32
REQMASKCLR
DMA Channel Request Mask Clear
0x24
-1
write-only
n
0x0
0x0
UDMA_REQMASKCLR_CLR
Channel [n] Request Mask Clear
0
32
write-only
REQMASKSET
DMA Channel Request Mask Set
0x20
-1
read-write
n
0x0
0x0
UDMA_REQMASKSET_SET
Channel [n] Request Mask Set
0
32
STAT
DMA Status
0x0
-1
read-write
n
0x0
0x0
UDMA_STAT_DMACHANS
Available uDMA Channels Minus 1
16
21
UDMA_STAT_MASTEN
Master Enable Status
0
1
UDMA_STAT_STATE
Control State Machine Status
4
8
UDMA_STAT_STATE_IDLE
Idle
0x0
UDMA_STAT_STATE_RD_CTRL
Reading channel controller data
0x1
UDMA_STAT_STATE_RD_SRCENDP
Reading source end pointer
0x2
UDMA_STAT_STATE_RD_DSTENDP
Reading destination end pointer
0x3
UDMA_STAT_STATE_RD_SRCDAT
Reading source data
0x4
UDMA_STAT_STATE_WR_DSTDAT
Writing destination data
0x5
UDMA_STAT_STATE_WAIT
Waiting for uDMA request to clear
0x6
UDMA_STAT_STATE_WR_CTRL
Writing channel controller data
0x7
UDMA_STAT_STATE_STALL
Stalled
0x8
UDMA_STAT_STATE_DONE
Done
0x9
UDMA_STAT_STATE_UNDEF
Undefined
0xa
SWREQ
DMA Channel Software Request
0x14
-1
write-only
n
0x0
0x0
UDMA_SWREQ
Channel [n] Software Request
0
32
write-only
UDMAALTBASE
DMA Alternate Channel Control Base Pointer
0xC
read-write
n
0x0
0x0
UDMA_ALTBASE_ADDR
Alternate Channel Address Pointer
0
32
UDMAALTCLR
DMA Channel Primary Alternate Clear
0x34
write-only
n
0x0
0x0
UDMA_ALTCLR_CLR
Channel [n] Alternate Clear
0
32
write-only
UDMAALTSET
DMA Channel Primary Alternate Set
0x30
read-write
n
0x0
0x0
UDMA_ALTSET_SET
Channel [n] Alternate Set
0
32
UDMACFG
DMA Configuration
0x4
write-only
n
0x0
0x0
UDMA_CFG_MASTEN
Controller Master Enable
0
1
write-only
UDMACHASGN
DMA Channel Assignment
0x500
read-write
n
0x0
0x0
UDMA_CHASGN
Channel [n] Assignment Select
0
32
UDMA_CHASGN_PRIMARY
Use the primary channel assignment
0x0
UDMA_CHASGN_SECONDARY
Use the secondary channel assignment
0x1
UDMACHIS
DMA Channel Interrupt Status
0x504
read-write
n
0x0
0x0
UDMA_CHIS
Channel [n] Interrupt Status
0
32
UDMACHMAP0
DMA Channel Map Select 0
0x510
read-write
n
0x0
0x0
UDMA_CHMAP0_CH0SEL
uDMA Channel 0 Source Select
0
4
UDMA_CHMAP0_CH1SEL
uDMA Channel 1 Source Select
4
8
UDMA_CHMAP0_CH2SEL
uDMA Channel 2 Source Select
8
12
UDMA_CHMAP0_CH3SEL
uDMA Channel 3 Source Select
12
16
UDMA_CHMAP0_CH4SEL
uDMA Channel 4 Source Select
16
20
UDMA_CHMAP0_CH5SEL
uDMA Channel 5 Source Select
20
24
UDMA_CHMAP0_CH6SEL
uDMA Channel 6 Source Select
24
28
UDMA_CHMAP0_CH7SEL
uDMA Channel 7 Source Select
28
32
UDMACHMAP1
DMA Channel Map Select 1
0x514
read-write
n
0x0
0x0
UDMA_CHMAP1_CH10SEL
uDMA Channel 10 Source Select
8
12
UDMA_CHMAP1_CH11SEL
uDMA Channel 11 Source Select
12
16
UDMA_CHMAP1_CH12SEL
uDMA Channel 12 Source Select
16
20
UDMA_CHMAP1_CH13SEL
uDMA Channel 13 Source Select
20
24
UDMA_CHMAP1_CH14SEL
uDMA Channel 14 Source Select
24
28
UDMA_CHMAP1_CH15SEL
uDMA Channel 15 Source Select
28
32
UDMA_CHMAP1_CH8SEL
uDMA Channel 8 Source Select
0
4
UDMA_CHMAP1_CH9SEL
uDMA Channel 9 Source Select
4
8
UDMACHMAP2
DMA Channel Map Select 2
0x518
read-write
n
0x0
0x0
UDMA_CHMAP2_CH16SEL
uDMA Channel 16 Source Select
0
4
UDMA_CHMAP2_CH17SEL
uDMA Channel 17 Source Select
4
8
UDMA_CHMAP2_CH18SEL
uDMA Channel 18 Source Select
8
12
UDMA_CHMAP2_CH19SEL
uDMA Channel 19 Source Select
12
16
UDMA_CHMAP2_CH20SEL
uDMA Channel 20 Source Select
16
20
UDMA_CHMAP2_CH21SEL
uDMA Channel 21 Source Select
20
24
UDMA_CHMAP2_CH22SEL
uDMA Channel 22 Source Select
24
28
UDMA_CHMAP2_CH23SEL
uDMA Channel 23 Source Select
28
32
UDMACHMAP3
DMA Channel Map Select 3
0x51C
read-write
n
0x0
0x0
UDMA_CHMAP3_CH24SEL
uDMA Channel 24 Source Select
0
4
UDMA_CHMAP3_CH25SEL
uDMA Channel 25 Source Select
4
8
UDMA_CHMAP3_CH26SEL
uDMA Channel 26 Source Select
8
12
UDMA_CHMAP3_CH27SEL
uDMA Channel 27 Source Select
12
16
UDMA_CHMAP3_CH28SEL
uDMA Channel 28 Source Select
16
20
UDMA_CHMAP3_CH29SEL
uDMA Channel 29 Source Select
20
24
UDMA_CHMAP3_CH30SEL
uDMA Channel 30 Source Select
24
28
UDMA_CHMAP3_CH31SEL
uDMA Channel 31 Source Select
28
32
UDMACTLBASE
DMA Channel Control Base Pointer
0x8
read-write
n
0x0
0x0
UDMA_CTLBASE_ADDR
Channel Control Base Address
10
32
UDMAENACLR
DMA Channel Enable Clear
0x2C
write-only
n
0x0
0x0
UDMA_ENACLR_CLR
Clear Channel [n] Enable Clear
0
32
write-only
UDMAENASET
DMA Channel Enable Set
0x28
read-write
n
0x0
0x0
UDMA_ENASET_SET
Channel [n] Enable Set
0
32
UDMAERRCLR
DMA Bus Error Clear
0x4C
read-write
n
0x0
0x0
UDMA_ERRCLR_ERRCLR
uDMA Bus Error Status
0
1
UDMAPRIOCLR
DMA Channel Priority Clear
0x3C
write-only
n
0x0
0x0
UDMA_PRIOCLR_CLR
Channel [n] Priority Clear
0
32
write-only
UDMAPRIOSET
DMA Channel Priority Set
0x38
read-write
n
0x0
0x0
UDMA_PRIOSET_SET
Channel [n] Priority Set
0
32
UDMAREQMASKCLR
DMA Channel Request Mask Clear
0x24
write-only
n
0x0
0x0
UDMA_REQMASKCLR_CLR
Channel [n] Request Mask Clear
0
32
write-only
UDMAREQMASKSET
DMA Channel Request Mask Set
0x20
read-write
n
0x0
0x0
UDMA_REQMASKSET_SET
Channel [n] Request Mask Set
0
32
UDMASTAT
DMA Status
0x0
read-write
n
0x0
0x0
UDMA_STAT_DMACHANS
Available uDMA Channels Minus 1
16
21
UDMA_STAT_MASTEN
Master Enable Status
0
1
UDMA_STAT_STATE
Control State Machine Status
4
8
UDMA_STAT_STATE_IDLE
Idle
0x0
UDMA_STAT_STATE_RD_CTRL
Reading channel controller data
0x1
UDMA_STAT_STATE_RD_SRCENDP
Reading source end pointer
0x2
UDMA_STAT_STATE_RD_DSTENDP
Reading destination end pointer
0x3
UDMA_STAT_STATE_RD_SRCDAT
Reading source data
0x4
UDMA_STAT_STATE_WR_DSTDAT
Writing destination data
0x5
UDMA_STAT_STATE_WAIT
Waiting for uDMA request to clear
0x6
UDMA_STAT_STATE_WR_CTRL
Writing channel controller data
0x7
UDMA_STAT_STATE_STALL
Stalled
0x8
UDMA_STAT_STATE_DONE
Done
0x9
UDMA_STAT_STATE_UNDEF
Undefined
0xa
UDMASWREQ
DMA Channel Software Request
0x14
write-only
n
0x0
0x0
UDMA_SWREQ
Channel [n] Software Request
0
32
write-only
UDMAUSEBURSTCLR
DMA Channel Useburst Clear
0x1C
write-only
n
0x0
0x0
UDMA_USEBURSTCLR_CLR
Channel [n] Useburst Clear
0
32
write-only
UDMAUSEBURSTSET
DMA Channel Useburst Set
0x18
read-write
n
0x0
0x0
UDMA_USEBURSTSET_SET
Channel [n] Useburst Set
0
32
UDMAWAITSTAT
DMA Channel Wait-on-Request Status
0x10
read-write
n
0x0
0x0
UDMA_WAITSTAT_WAITREQ
Channel [n] Wait Status
0
32
USEBURSTCLR
DMA Channel Useburst Clear
0x1C
-1
write-only
n
0x0
0x0
UDMA_USEBURSTCLR_CLR
Channel [n] Useburst Clear
0
32
write-only
USEBURSTSET
DMA Channel Useburst Set
0x18
-1
read-write
n
0x0
0x0
UDMA_USEBURSTSET_SET
Channel [n] Useburst Set
0
32
WAITSTAT
DMA Channel Wait-on-Request Status
0x10
-1
read-write
n
0x0
0x0
UDMA_WAITSTAT_WAITREQ
Channel [n] Wait Status
0
32
USB0
Register map for USB0 peripheral
USB
0x0
0x0
0x1000
registers
n
CONTIM
USB Connect Timing
0x7A
8
read-write
n
0x0
0x0
USB_CONTIM_WTCON
Connect Wait
4
8
USB_CONTIM_WTID
Wait ID
0
4
COUNT0
USB Receive Byte Count Endpoint 0
0x108
8
read-write
n
0x0
0x0
USB_COUNT0_COUNT
FIFO Count
0
7
CSRH0
USB Control and Status Endpoint 0 High
0x103
8
write-only
n
0x0
0x0
USB_CSRH0_FLUSH
Flush FIFO
0
1
write-only
CSRL0
USB Control and Status Endpoint 0 Low
0x102
8
write-only
n
0x0
0x0
USB_CSRL0_DATAEND
Data End
3
4
write-only
USB_CSRL0_RXRDY
Receive Packet Ready
0
1
write-only
USB_CSRL0_RXRDYC
RXRDY Clear
6
7
write-only
USB_CSRL0_SETEND
Setup End
4
5
write-only
USB_CSRL0_SETENDC
Setup End Clear
7
8
write-only
USB_CSRL0_STALL
Send Stall
5
6
write-only
USB_CSRL0_STALLED
Endpoint Stalled
2
3
write-only
USB_CSRL0_TXRDY
Transmit Packet Ready
1
2
write-only
DMASEL
USB DMA Select
0x450
-1
read-write
n
0x0
0x0
USB_DMASEL_DMAARX
DMA A RX Select
0
4
USB_DMASEL_DMAATX
DMA A TX Select
4
8
USB_DMASEL_DMABRX
DMA B RX Select
8
12
USB_DMASEL_DMABTX
DMA B TX Select
12
16
USB_DMASEL_DMACRX
DMA C RX Select
16
20
USB_DMASEL_DMACTX
DMA C TX Select
20
24
DRIM
USB Device RESUME Interrupt Mask
0x414
-1
read-write
n
0x0
0x0
USB_DRIM_RESUME
RESUME Interrupt Mask
0
1
DRISC
USB Device RESUME Interrupt Status and Clear
0x418
-1
write-only
n
0x0
0x0
USB_DRISC_RESUME
RESUME Interrupt Status and Clear
0
1
write-only
DRRIS
USB Device RESUME Raw Interrupt Status
0x410
-1
read-write
n
0x0
0x0
USB_DRRIS_RESUME
RESUME Interrupt Status
0
1
EPIDX
USB Endpoint Index
0xE
8
read-write
n
0x0
0x0
USB_EPIDX_EPIDX
Endpoint Index
0
4
FADDR
USB Device Functional Address
0x0
8
read-write
n
0x0
0x0
USB_FADDR
Function Address
0
7
FIFO0
USB FIFO Endpoint 0
0x20
-1
read-write
n
0x0
0x0
USB_FIFO0_EPDATA
Endpoint Data
0
32
FIFO1
USB FIFO Endpoint 1
0x24
-1
read-write
n
0x0
0x0
USB_FIFO1_EPDATA
Endpoint Data
0
32
FIFO2
USB FIFO Endpoint 2
0x28
-1
read-write
n
0x0
0x0
USB_FIFO2_EPDATA
Endpoint Data
0
32
FIFO3
USB FIFO Endpoint 3
0x2C
-1
read-write
n
0x0
0x0
USB_FIFO3_EPDATA
Endpoint Data
0
32
FIFO4
USB FIFO Endpoint 4
0x30
-1
read-write
n
0x0
0x0
USB_FIFO4_EPDATA
Endpoint Data
0
32
FIFO5
USB FIFO Endpoint 5
0x34
-1
read-write
n
0x0
0x0
USB_FIFO5_EPDATA
Endpoint Data
0
32
FIFO6
USB FIFO Endpoint 6
0x38
-1
read-write
n
0x0
0x0
USB_FIFO6_EPDATA
Endpoint Data
0
32
FIFO7
USB FIFO Endpoint 7
0x3C
-1
read-write
n
0x0
0x0
USB_FIFO7_EPDATA
Endpoint Data
0
32
FRAME
USB Frame Value
0xC
16
read-write
n
0x0
0x0
USB_FRAME
Frame Number
0
11
FSEOF
USB Full-Speed Last Transaction to End of Frame Timing
0x7D
8
read-write
n
0x0
0x0
USB_FSEOF_FSEOFG
Full-Speed End-of-Frame Gap
0
8
IE
USB Interrupt Enable
0xB
8
read-write
n
0x0
0x0
USB_IE_DISCON
Enable Disconnect Interrupt
5
6
USB_IE_RESET
Enable RESET Interrupt
2
3
USB_IE_RESUME
Enable RESUME Interrupt
1
2
USB_IE_SOF
Enable Start-of-Frame Interrupt
3
4
USB_IE_SUSPND
Enable SUSPEND Interrupt
0
1
IS
USB General Interrupt Status
0xA
8
read-write
n
0x0
0x0
USB_IS_DISCON
Session Disconnect
5
6
USB_IS_RESET
RESET Signaling Detected
2
3
USB_IS_RESUME
RESUME Signaling Detected
1
2
USB_IS_SOF
Start of Frame
3
4
USB_IS_SUSPEND
SUSPEND Signaling Detected
0
1
LSEOF
USB Low-Speed Last Transaction to End of Frame Timing
0x7E
8
read-write
n
0x0
0x0
USB_LSEOF_LSEOFG
Low-Speed End-of-Frame Gap
0
8
POWER
USB Power
0x1
8
read-write
n
0x0
0x0
USB_POWER_ISOUP
Isochronous Update
7
8
USB_POWER_PWRDNPHY
Power Down PHY
0
1
USB_POWER_RESET
RESET Signaling
3
4
USB_POWER_RESUME
RESUME Signaling
2
3
USB_POWER_SOFTCONN
Soft Connect/Disconnect
6
7
USB_POWER_SUSPEND
SUSPEND Mode
1
2
PP
USB Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
USB_PP_ECNT
Endpoint Count
8
16
USB_PP_PHY
PHY Present
4
5
USB_PP_TYPE
Controller Type
0
4
USB_PP_TYPE_0
The first-generation USB controller
0x0
USB_PP_USB
USB Capability
6
8
USB_PP_USB_DEVICE
DEVICE
0x1
USB_PP_USB_HOSTDEVICE
HOST
0x2
USB_PP_USB_OTG
OTG
0x3
RXCOUNT1
USB Receive Byte Count Endpoint 1
0x118
16
read-write
n
0x0
0x0
USB_RXCOUNT1_COUNT
Receive Packet Count
0
13
RXCOUNT2
USB Receive Byte Count Endpoint 2
0x128
16
read-write
n
0x0
0x0
USB_RXCOUNT2_COUNT
Receive Packet Count
0
13
RXCOUNT3
USB Receive Byte Count Endpoint 3
0x138
16
read-write
n
0x0
0x0
USB_RXCOUNT3_COUNT
Receive Packet Count
0
13
RXCOUNT4
USB Receive Byte Count Endpoint 4
0x148
16
read-write
n
0x0
0x0
USB_RXCOUNT4_COUNT
Receive Packet Count
0
13
RXCOUNT5
USB Receive Byte Count Endpoint 5
0x158
16
read-write
n
0x0
0x0
USB_RXCOUNT5_COUNT
Receive Packet Count
0
13
RXCOUNT6
USB Receive Byte Count Endpoint 6
0x168
16
read-write
n
0x0
0x0
USB_RXCOUNT6_COUNT
Receive Packet Count
0
13
RXCOUNT7
USB Receive Byte Count Endpoint 7
0x178
16
read-write
n
0x0
0x0
USB_RXCOUNT7_COUNT
Receive Packet Count
0
13
RXCSRH1
USB Receive Control and Status Endpoint 1 High
0x117
8
read-write
n
0x0
0x0
USB_RXCSRH1_AUTOCL
Auto Clear
7
8
USB_RXCSRH1_DISNYET
Disable NYET
4
5
USB_RXCSRH1_DMAEN
DMA Request Enable
5
6
USB_RXCSRH1_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH1_ISO
Isochronous Transfers
6
7
USB_RXCSRH1_PIDERR
PID Error
4
5
RXCSRH2
USB Receive Control and Status Endpoint 2 High
0x127
8
read-write
n
0x0
0x0
USB_RXCSRH2_AUTOCL
Auto Clear
7
8
USB_RXCSRH2_DISNYET
Disable NYET
4
5
USB_RXCSRH2_DMAEN
DMA Request Enable
5
6
USB_RXCSRH2_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH2_ISO
Isochronous Transfers
6
7
USB_RXCSRH2_PIDERR
PID Error
4
5
RXCSRH3
USB Receive Control and Status Endpoint 3 High
0x137
8
read-write
n
0x0
0x0
USB_RXCSRH3_AUTOCL
Auto Clear
7
8
USB_RXCSRH3_DISNYET
Disable NYET
4
5
USB_RXCSRH3_DMAEN
DMA Request Enable
5
6
USB_RXCSRH3_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH3_ISO
Isochronous Transfers
6
7
USB_RXCSRH3_PIDERR
PID Error
4
5
RXCSRH4
USB Receive Control and Status Endpoint 4 High
0x147
8
read-write
n
0x0
0x0
USB_RXCSRH4_AUTOCL
Auto Clear
7
8
USB_RXCSRH4_DISNYET
Disable NYET
4
5
USB_RXCSRH4_DMAEN
DMA Request Enable
5
6
USB_RXCSRH4_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH4_ISO
Isochronous Transfers
6
7
USB_RXCSRH4_PIDERR
PID Error
4
5
RXCSRH5
USB Receive Control and Status Endpoint 5 High
0x157
8
read-write
n
0x0
0x0
USB_RXCSRH5_AUTOCL
Auto Clear
7
8
USB_RXCSRH5_DISNYET
Disable NYET
4
5
USB_RXCSRH5_DMAEN
DMA Request Enable
5
6
USB_RXCSRH5_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH5_ISO
Isochronous Transfers
6
7
USB_RXCSRH5_PIDERR
PID Error
4
5
RXCSRH6
USB Receive Control and Status Endpoint 6 High
0x167
8
read-write
n
0x0
0x0
USB_RXCSRH6_AUTOCL
Auto Clear
7
8
USB_RXCSRH6_DISNYET
Disable NYET
4
5
USB_RXCSRH6_DMAEN
DMA Request Enable
5
6
USB_RXCSRH6_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH6_ISO
Isochronous Transfers
6
7
USB_RXCSRH6_PIDERR
PID Error
4
5
RXCSRH7
USB Receive Control and Status Endpoint 7 High
0x177
8
read-write
n
0x0
0x0
USB_RXCSRH7_AUTOCL
Auto Clear
7
8
USB_RXCSRH7_DISNYET
Disable NYET
4
5
USB_RXCSRH7_DMAEN
DMA Request Enable
5
6
USB_RXCSRH7_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH7_ISO
Isochronous Transfers
6
7
USB_RXCSRH7_PIDERR
PID Error
4
5
RXCSRL1
USB Receive Control and Status Endpoint 1 Low
0x116
8
read-write
n
0x0
0x0
USB_RXCSRL1_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL1_DATAERR
Data Error
3
4
USB_RXCSRL1_FLUSH
Flush FIFO
4
5
USB_RXCSRL1_FULL
FIFO Full
1
2
USB_RXCSRL1_OVER
Overrun
2
3
USB_RXCSRL1_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL1_STALL
Send STALL
5
6
USB_RXCSRL1_STALLED
Endpoint Stalled
6
7
RXCSRL2
USB Receive Control and Status Endpoint 2 Low
0x126
8
read-write
n
0x0
0x0
USB_RXCSRL2_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL2_DATAERR
Data Error
3
4
USB_RXCSRL2_FLUSH
Flush FIFO
4
5
USB_RXCSRL2_FULL
FIFO Full
1
2
USB_RXCSRL2_OVER
Overrun
2
3
USB_RXCSRL2_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL2_STALL
Send STALL
5
6
USB_RXCSRL2_STALLED
Endpoint Stalled
6
7
RXCSRL3
USB Receive Control and Status Endpoint 3 Low
0x136
8
read-write
n
0x0
0x0
USB_RXCSRL3_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL3_DATAERR
Data Error
3
4
USB_RXCSRL3_FLUSH
Flush FIFO
4
5
USB_RXCSRL3_FULL
FIFO Full
1
2
USB_RXCSRL3_OVER
Overrun
2
3
USB_RXCSRL3_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL3_STALL
Send STALL
5
6
USB_RXCSRL3_STALLED
Endpoint Stalled
6
7
RXCSRL4
USB Receive Control and Status Endpoint 4 Low
0x146
8
read-write
n
0x0
0x0
USB_RXCSRL4_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL4_DATAERR
Data Error
3
4
USB_RXCSRL4_FLUSH
Flush FIFO
4
5
USB_RXCSRL4_FULL
FIFO Full
1
2
USB_RXCSRL4_OVER
Overrun
2
3
USB_RXCSRL4_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL4_STALL
Send STALL
5
6
USB_RXCSRL4_STALLED
Endpoint Stalled
6
7
RXCSRL5
USB Receive Control and Status Endpoint 5 Low
0x156
8
read-write
n
0x0
0x0
USB_RXCSRL5_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL5_DATAERR
Data Error
3
4
USB_RXCSRL5_FLUSH
Flush FIFO
4
5
USB_RXCSRL5_FULL
FIFO Full
1
2
USB_RXCSRL5_OVER
Overrun
2
3
USB_RXCSRL5_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL5_STALL
Send STALL
5
6
USB_RXCSRL5_STALLED
Endpoint Stalled
6
7
RXCSRL6
USB Receive Control and Status Endpoint 6 Low
0x166
8
read-write
n
0x0
0x0
USB_RXCSRL6_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL6_DATAERR
Data Error
3
4
USB_RXCSRL6_FLUSH
Flush FIFO
4
5
USB_RXCSRL6_FULL
FIFO Full
1
2
USB_RXCSRL6_OVER
Overrun
2
3
USB_RXCSRL6_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL6_STALL
Send STALL
5
6
USB_RXCSRL6_STALLED
Endpoint Stalled
6
7
RXCSRL7
USB Receive Control and Status Endpoint 7 Low
0x176
8
read-write
n
0x0
0x0
USB_RXCSRL7_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL7_DATAERR
Data Error
3
4
USB_RXCSRL7_FLUSH
Flush FIFO
4
5
USB_RXCSRL7_FULL
FIFO Full
1
2
USB_RXCSRL7_OVER
Overrun
2
3
USB_RXCSRL7_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL7_STALL
Send STALL
5
6
USB_RXCSRL7_STALLED
Endpoint Stalled
6
7
RXDPKTBUFDIS
USB Receive Double Packet Buffer Disable
0x340
16
read-write
n
0x0
0x0
USB_RXDPKTBUFDIS_EP1
EP1 RX Double-Packet Buffer Disable
1
2
USB_RXDPKTBUFDIS_EP2
EP2 RX Double-Packet Buffer Disable
2
3
USB_RXDPKTBUFDIS_EP3
EP3 RX Double-Packet Buffer Disable
3
4
USB_RXDPKTBUFDIS_EP4
EP4 RX Double-Packet Buffer Disable
4
5
USB_RXDPKTBUFDIS_EP5
EP5 RX Double-Packet Buffer Disable
5
6
USB_RXDPKTBUFDIS_EP6
EP6 RX Double-Packet Buffer Disable
6
7
USB_RXDPKTBUFDIS_EP7
EP7 RX Double-Packet Buffer Disable
7
8
RXFIFOADD
USB Receive FIFO Start Address
0x66
16
read-write
n
0x0
0x0
USB_RXFIFOADD_ADDR
Transmit/Receive Start Address
0
9
RXFIFOSZ
USB Receive Dynamic FIFO Sizing
0x63
8
read-write
n
0x0
0x0
USB_RXFIFOSZ_DPB
Double Packet Buffer Support
4
5
USB_RXFIFOSZ_SIZE
Max Packet Size
0
4
USB_RXFIFOSZ_SIZE_8
8
0x0
USB_RXFIFOSZ_SIZE_16
16
0x1
USB_RXFIFOSZ_SIZE_32
32
0x2
USB_RXFIFOSZ_SIZE_64
64
0x3
USB_RXFIFOSZ_SIZE_128
128
0x4
USB_RXFIFOSZ_SIZE_256
256
0x5
USB_RXFIFOSZ_SIZE_512
512
0x6
USB_RXFIFOSZ_SIZE_1024
1024
0x7
USB_RXFIFOSZ_SIZE_2048
2048
0x8
RXIE
USB Receive Interrupt Enable
0x8
16
read-write
n
0x0
0x0
USB_RXIE_EP1
RX Endpoint 1 Interrupt Enable
1
2
USB_RXIE_EP2
RX Endpoint 2 Interrupt Enable
2
3
USB_RXIE_EP3
RX Endpoint 3 Interrupt Enable
3
4
USB_RXIE_EP4
RX Endpoint 4 Interrupt Enable
4
5
USB_RXIE_EP5
RX Endpoint 5 Interrupt Enable
5
6
USB_RXIE_EP6
RX Endpoint 6 Interrupt Enable
6
7
USB_RXIE_EP7
RX Endpoint 7 Interrupt Enable
7
8
RXIS
USB Receive Interrupt Status
0x4
16
read-write
n
0x0
0x0
USB_RXIS_EP1
RX Endpoint 1 Interrupt
1
2
USB_RXIS_EP2
RX Endpoint 2 Interrupt
2
3
USB_RXIS_EP3
RX Endpoint 3 Interrupt
3
4
USB_RXIS_EP4
RX Endpoint 4 Interrupt
4
5
USB_RXIS_EP5
RX Endpoint 5 Interrupt
5
6
USB_RXIS_EP6
RX Endpoint 6 Interrupt
6
7
USB_RXIS_EP7
RX Endpoint 7 Interrupt
7
8
RXMAXP1
USB Maximum Receive Data Endpoint 1
0x114
16
read-write
n
0x0
0x0
USB_RXMAXP1_MAXLOAD
Maximum Payload
0
11
RXMAXP2
USB Maximum Receive Data Endpoint 2
0x124
16
read-write
n
0x0
0x0
USB_RXMAXP2_MAXLOAD
Maximum Payload
0
11
RXMAXP3
USB Maximum Receive Data Endpoint 3
0x134
16
read-write
n
0x0
0x0
USB_RXMAXP3_MAXLOAD
Maximum Payload
0
11
RXMAXP4
USB Maximum Receive Data Endpoint 4
0x144
16
read-write
n
0x0
0x0
USB_RXMAXP4_MAXLOAD
Maximum Payload
0
11
RXMAXP5
USB Maximum Receive Data Endpoint 5
0x154
16
read-write
n
0x0
0x0
USB_RXMAXP5_MAXLOAD
Maximum Payload
0
11
RXMAXP6
USB Maximum Receive Data Endpoint 6
0x164
16
read-write
n
0x0
0x0
USB_RXMAXP6_MAXLOAD
Maximum Payload
0
11
RXMAXP7
USB Maximum Receive Data Endpoint 7
0x174
16
read-write
n
0x0
0x0
USB_RXMAXP7_MAXLOAD
Maximum Payload
0
11
TEST
USB Test Mode
0xF
8
read-write
n
0x0
0x0
USB_TEST_FIFOACC
FIFO Access
6
7
USB_TEST_FORCEFS
Force Full-Speed Mode
5
6
TXCSRH1
USB Transmit Control and Status Endpoint 1 High
0x113
8
read-write
n
0x0
0x0
USB_TXCSRH1_AUTOSET
Auto Set
7
8
USB_TXCSRH1_DMAEN
DMA Request Enable
4
5
USB_TXCSRH1_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH1_FDT
Force Data Toggle
3
4
USB_TXCSRH1_ISO
Isochronous Transfers
6
7
USB_TXCSRH1_MODE
Mode
5
6
TXCSRH2
USB Transmit Control and Status Endpoint 2 High
0x123
8
read-write
n
0x0
0x0
USB_TXCSRH2_AUTOSET
Auto Set
7
8
USB_TXCSRH2_DMAEN
DMA Request Enable
4
5
USB_TXCSRH2_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH2_FDT
Force Data Toggle
3
4
USB_TXCSRH2_ISO
Isochronous Transfers
6
7
USB_TXCSRH2_MODE
Mode
5
6
TXCSRH3
USB Transmit Control and Status Endpoint 3 High
0x133
8
read-write
n
0x0
0x0
USB_TXCSRH3_AUTOSET
Auto Set
7
8
USB_TXCSRH3_DMAEN
DMA Request Enable
4
5
USB_TXCSRH3_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH3_FDT
Force Data Toggle
3
4
USB_TXCSRH3_ISO
Isochronous Transfers
6
7
USB_TXCSRH3_MODE
Mode
5
6
TXCSRH4
USB Transmit Control and Status Endpoint 4 High
0x143
8
read-write
n
0x0
0x0
USB_TXCSRH4_AUTOSET
Auto Set
7
8
USB_TXCSRH4_DMAEN
DMA Request Enable
4
5
USB_TXCSRH4_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH4_FDT
Force Data Toggle
3
4
USB_TXCSRH4_ISO
Isochronous Transfers
6
7
USB_TXCSRH4_MODE
Mode
5
6
TXCSRH5
USB Transmit Control and Status Endpoint 5 High
0x153
8
read-write
n
0x0
0x0
USB_TXCSRH5_AUTOSET
Auto Set
7
8
USB_TXCSRH5_DMAEN
DMA Request Enable
4
5
USB_TXCSRH5_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH5_FDT
Force Data Toggle
3
4
USB_TXCSRH5_ISO
Isochronous Transfers
6
7
USB_TXCSRH5_MODE
Mode
5
6
TXCSRH6
USB Transmit Control and Status Endpoint 6 High
0x163
8
read-write
n
0x0
0x0
USB_TXCSRH6_AUTOSET
Auto Set
7
8
USB_TXCSRH6_DMAEN
DMA Request Enable
4
5
USB_TXCSRH6_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH6_FDT
Force Data Toggle
3
4
USB_TXCSRH6_ISO
Isochronous Transfers
6
7
USB_TXCSRH6_MODE
Mode
5
6
TXCSRH7
USB Transmit Control and Status Endpoint 7 High
0x173
8
read-write
n
0x0
0x0
USB_TXCSRH7_AUTOSET
Auto Set
7
8
USB_TXCSRH7_DMAEN
DMA Request Enable
4
5
USB_TXCSRH7_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH7_FDT
Force Data Toggle
3
4
USB_TXCSRH7_ISO
Isochronous Transfers
6
7
USB_TXCSRH7_MODE
Mode
5
6
TXCSRL1
USB Transmit Control and Status Endpoint 1 Low
0x112
8
read-write
n
0x0
0x0
USB_TXCSRL1_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL1_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL1_FLUSH
Flush FIFO
3
4
USB_TXCSRL1_STALL
Send STALL
4
5
USB_TXCSRL1_STALLED
Endpoint Stalled
5
6
USB_TXCSRL1_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL1_UNDRN
Underrun
2
3
TXCSRL2
USB Transmit Control and Status Endpoint 2 Low
0x122
8
read-write
n
0x0
0x0
USB_TXCSRL2_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL2_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL2_FLUSH
Flush FIFO
3
4
USB_TXCSRL2_STALL
Send STALL
4
5
USB_TXCSRL2_STALLED
Endpoint Stalled
5
6
USB_TXCSRL2_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL2_UNDRN
Underrun
2
3
TXCSRL3
USB Transmit Control and Status Endpoint 3 Low
0x132
8
read-write
n
0x0
0x0
USB_TXCSRL3_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL3_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL3_FLUSH
Flush FIFO
3
4
USB_TXCSRL3_STALL
Send STALL
4
5
USB_TXCSRL3_STALLED
Endpoint Stalled
5
6
USB_TXCSRL3_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL3_UNDRN
Underrun
2
3
TXCSRL4
USB Transmit Control and Status Endpoint 4 Low
0x142
8
read-write
n
0x0
0x0
USB_TXCSRL4_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL4_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL4_FLUSH
Flush FIFO
3
4
USB_TXCSRL4_STALL
Send STALL
4
5
USB_TXCSRL4_STALLED
Endpoint Stalled
5
6
USB_TXCSRL4_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL4_UNDRN
Underrun
2
3
TXCSRL5
USB Transmit Control and Status Endpoint 5 Low
0x152
8
read-write
n
0x0
0x0
USB_TXCSRL5_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL5_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL5_FLUSH
Flush FIFO
3
4
USB_TXCSRL5_STALL
Send STALL
4
5
USB_TXCSRL5_STALLED
Endpoint Stalled
5
6
USB_TXCSRL5_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL5_UNDRN
Underrun
2
3
TXCSRL6
USB Transmit Control and Status Endpoint 6 Low
0x162
8
read-write
n
0x0
0x0
USB_TXCSRL6_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL6_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL6_FLUSH
Flush FIFO
3
4
USB_TXCSRL6_STALL
Send STALL
4
5
USB_TXCSRL6_STALLED
Endpoint Stalled
5
6
USB_TXCSRL6_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL6_UNDRN
Underrun
2
3
TXCSRL7
USB Transmit Control and Status Endpoint 7 Low
0x172
8
read-write
n
0x0
0x0
USB_TXCSRL7_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL7_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL7_FLUSH
Flush FIFO
3
4
USB_TXCSRL7_STALL
Send STALL
4
5
USB_TXCSRL7_STALLED
Endpoint Stalled
5
6
USB_TXCSRL7_TXRDY
Transmit Packet Ready
0
1
USB_TXCSRL7_UNDRN
Underrun
2
3
TXDPKTBUFDIS
USB Transmit Double Packet Buffer Disable
0x342
16
read-write
n
0x0
0x0
USB_TXDPKTBUFDIS_EP1
EP1 TX Double-Packet Buffer Disable
1
2
USB_TXDPKTBUFDIS_EP2
EP2 TX Double-Packet Buffer Disable
2
3
USB_TXDPKTBUFDIS_EP3
EP3 TX Double-Packet Buffer Disable
3
4
USB_TXDPKTBUFDIS_EP4
EP4 TX Double-Packet Buffer Disable
4
5
USB_TXDPKTBUFDIS_EP5
EP5 TX Double-Packet Buffer Disable
5
6
USB_TXDPKTBUFDIS_EP6
EP6 TX Double-Packet Buffer Disable
6
7
USB_TXDPKTBUFDIS_EP7
EP7 TX Double-Packet Buffer Disable
7
8
TXFIFOADD
USB Transmit FIFO Start Address
0x64
16
read-write
n
0x0
0x0
USB_TXFIFOADD_ADDR
Transmit/Receive Start Address
0
9
TXFIFOSZ
USB Transmit Dynamic FIFO Sizing
0x62
8
read-write
n
0x0
0x0
USB_TXFIFOSZ_DPB
Double Packet Buffer Support
4
5
USB_TXFIFOSZ_SIZE
Max Packet Size
0
4
USB_TXFIFOSZ_SIZE_8
8
0x0
USB_TXFIFOSZ_SIZE_16
16
0x1
USB_TXFIFOSZ_SIZE_32
32
0x2
USB_TXFIFOSZ_SIZE_64
64
0x3
USB_TXFIFOSZ_SIZE_128
128
0x4
USB_TXFIFOSZ_SIZE_256
256
0x5
USB_TXFIFOSZ_SIZE_512
512
0x6
USB_TXFIFOSZ_SIZE_1024
1024
0x7
USB_TXFIFOSZ_SIZE_2048
2048
0x8
TXIE
USB Transmit Interrupt Enable
0x6
16
read-write
n
0x0
0x0
USB_TXIE_EP0
TX and RX Endpoint 0 Interrupt Enable
0
1
USB_TXIE_EP1
TX Endpoint 1 Interrupt Enable
1
2
USB_TXIE_EP2
TX Endpoint 2 Interrupt Enable
2
3
USB_TXIE_EP3
TX Endpoint 3 Interrupt Enable
3
4
USB_TXIE_EP4
TX Endpoint 4 Interrupt Enable
4
5
USB_TXIE_EP5
TX Endpoint 5 Interrupt Enable
5
6
USB_TXIE_EP6
TX Endpoint 6 Interrupt Enable
6
7
USB_TXIE_EP7
TX Endpoint 7 Interrupt Enable
7
8
TXIS
USB Transmit Interrupt Status
0x2
16
read-write
n
0x0
0x0
USB_TXIS_EP0
TX and RX Endpoint 0 Interrupt
0
1
USB_TXIS_EP1
TX Endpoint 1 Interrupt
1
2
USB_TXIS_EP2
TX Endpoint 2 Interrupt
2
3
USB_TXIS_EP3
TX Endpoint 3 Interrupt
3
4
USB_TXIS_EP4
TX Endpoint 4 Interrupt
4
5
USB_TXIS_EP5
TX Endpoint 5 Interrupt
5
6
USB_TXIS_EP6
TX Endpoint 6 Interrupt
6
7
USB_TXIS_EP7
TX Endpoint 7 Interrupt
7
8
TXMAXP1
USB Maximum Transmit Data Endpoint 1
0x110
16
read-write
n
0x0
0x0
USB_TXMAXP1_MAXLOAD
Maximum Payload
0
11
TXMAXP2
USB Maximum Transmit Data Endpoint 2
0x120
16
read-write
n
0x0
0x0
USB_TXMAXP2_MAXLOAD
Maximum Payload
0
11
TXMAXP3
USB Maximum Transmit Data Endpoint 3
0x130
16
read-write
n
0x0
0x0
USB_TXMAXP3_MAXLOAD
Maximum Payload
0
11
TXMAXP4
USB Maximum Transmit Data Endpoint 4
0x140
16
read-write
n
0x0
0x0
USB_TXMAXP4_MAXLOAD
Maximum Payload
0
11
TXMAXP5
USB Maximum Transmit Data Endpoint 5
0x150
16
read-write
n
0x0
0x0
USB_TXMAXP5_MAXLOAD
Maximum Payload
0
11
TXMAXP6
USB Maximum Transmit Data Endpoint 6
0x160
16
read-write
n
0x0
0x0
USB_TXMAXP6_MAXLOAD
Maximum Payload
0
11
TXMAXP7
USB Maximum Transmit Data Endpoint 7
0x170
16
read-write
n
0x0
0x0
USB_TXMAXP7_MAXLOAD
Maximum Payload
0
11
USB0CONTIM
USB Connect Timing
0x7A
8
read-write
n
0x0
0x0
USB_CONTIM_WTCON
Connect Wait
4
8
USB_CONTIM_WTID
Wait ID
0
4
USB0COUNT0
USB Receive Byte Count Endpoint 0
0x108
8
read-write
n
0x0
0x0
USB_COUNT0_COUNT
FIFO Count
0
7
USB0CSRH0
USB Control and Status Endpoint 0 High
0x103
8
write-only
n
0x0
0x0
USB_CSRH0_FLUSH
Flush FIFO
0
1
write-only
USB0CSRL0
USB Control and Status Endpoint 0 Low
0x102
8
write-only
n
0x0
0x0
USB_CSRL0_DATAEND
Data End
3
4
write-only
USB_CSRL0_RXRDY
Receive Packet Ready
0
1
write-only
USB_CSRL0_RXRDYC
RXRDY Clear
6
7
write-only
USB_CSRL0_SETEND
Setup End
4
5
write-only
USB_CSRL0_SETENDC
Setup End Clear
7
8
write-only
USB_CSRL0_STALL
Send Stall
5
6
write-only
USB_CSRL0_STALLED
Endpoint Stalled
2
3
write-only
USB_CSRL0_TXRDY
Transmit Packet Ready
1
2
write-only
USB0DMASEL
USB DMA Select
0x450
read-write
n
0x0
0x0
USB_DMASEL_DMAARX
DMA A RX Select
0
4
USB_DMASEL_DMAATX
DMA A TX Select
4
8
USB_DMASEL_DMABRX
DMA B RX Select
8
12
USB_DMASEL_DMABTX
DMA B TX Select
12
16
USB_DMASEL_DMACRX
DMA C RX Select
16
20
USB_DMASEL_DMACTX
DMA C TX Select
20
24
USB0DRIM
USB Device RESUME Interrupt Mask
0x414
read-write
n
0x0
0x0
USB_DRIM_RESUME
RESUME Interrupt Mask
0
1
USB0DRISC
USB Device RESUME Interrupt Status and Clear
0x418
write-only
n
0x0
0x0
USB_DRISC_RESUME
RESUME Interrupt Status and Clear
0
1
write-only
USB0DRRIS
USB Device RESUME Raw Interrupt Status
0x410
read-write
n
0x0
0x0
USB_DRRIS_RESUME
RESUME Interrupt Status
0
1
USB0EPIDX
USB Endpoint Index
0xE
8
read-write
n
0x0
0x0
USB_EPIDX_EPIDX
Endpoint Index
0
4
USB0FADDR
USB Device Functional Address
0x0
8
read-write
n
0x0
0x0
USB_FADDR
Function Address
0
7
USB0FIFO0
USB FIFO Endpoint 0
0x20
read-write
n
0x0
0x0
USB_FIFO0_EPDATA
Endpoint Data
0
32
USB0FIFO1
USB FIFO Endpoint 1
0x24
read-write
n
0x0
0x0
USB_FIFO1_EPDATA
Endpoint Data
0
32
USB0FIFO2
USB FIFO Endpoint 2
0x28
read-write
n
0x0
0x0
USB_FIFO2_EPDATA
Endpoint Data
0
32
USB0FIFO3
USB FIFO Endpoint 3
0x2C
read-write
n
0x0
0x0
USB_FIFO3_EPDATA
Endpoint Data
0
32
USB0FIFO4
USB FIFO Endpoint 4
0x30
read-write
n
0x0
0x0
USB_FIFO4_EPDATA
Endpoint Data
0
32
USB0FIFO5
USB FIFO Endpoint 5
0x34
read-write
n
0x0
0x0
USB_FIFO5_EPDATA
Endpoint Data
0
32
USB0FIFO6
USB FIFO Endpoint 6
0x38
read-write
n
0x0
0x0
USB_FIFO6_EPDATA
Endpoint Data
0
32
USB0FIFO7
USB FIFO Endpoint 7
0x3C
read-write
n
0x0
0x0
USB_FIFO7_EPDATA
Endpoint Data
0
32
USB0FRAME
USB Frame Value
0xC
16
read-write
n
0x0
0x0
USB_FRAME
Frame Number
0
11
USB0FSEOF
USB Full-Speed Last Transaction to End of Frame Timing
0x7D
8
read-write
n
0x0
0x0
USB_FSEOF_FSEOFG
Full-Speed End-of-Frame Gap
0
8
USB0IE
USB Interrupt Enable
0xB
8
read-write
n
0x0
0x0
USB_IE_DISCON
Enable Disconnect Interrupt
5
6
USB_IE_RESUME
Enable RESUME Interrupt
1
2
USB_IE_SOF
Enable Start-of-Frame Interrupt
3
4
USB_IE_SUSPND
Enable SUSPEND Interrupt
0
1
USB0IS
USB General Interrupt Status
0xA
8
read-write
n
0x0
0x0
USB_IS_DISCON
Session Disconnect
5
6
USB_IS_RESUME
RESUME Signaling Detected
1
2
USB_IS_SOF
Start of Frame
3
4
USB_IS_SUSPEND
SUSPEND Signaling Detected
0
1
USB0LSEOF
USB Low-Speed Last Transaction to End of Frame Timing
0x7E
8
read-write
n
0x0
0x0
USB_LSEOF_LSEOFG
Low-Speed End-of-Frame Gap
0
8
USB0POWER
USB Power
0x1
8
read-write
n
0x0
0x0
USB_POWER_ISOUP
Isochronous Update
7
8
USB_POWER_PWRDNPHY
Power Down PHY
0
1
USB_POWER_RESET
RESET Signaling
3
4
USB_POWER_RESUME
RESUME Signaling
2
3
USB_POWER_SOFTCONN
Soft Connect/Disconnect
6
7
USB_POWER_SUSPEND
SUSPEND Mode
1
2
USB0PP
USB Peripheral Properties
0xFC0
read-write
n
0x0
0x0
USB_PP_ECNT
Endpoint Count
8
16
USB_PP_PHY
PHY Present
4
5
USB_PP_TYPE
Controller Type
0
4
USB_PP_TYPE_0
The first-generation USB controller
0x0
USB_PP_USB
USB Capability
6
8
USB_PP_USB_DEVICE
DEVICE
0x1
USB_PP_USB_HOSTDEVICE
HOST
0x2
USB_PP_USB_OTG
OTG
0x3
USB0RXCOUNT1
USB Receive Byte Count Endpoint 1
0x118
16
read-write
n
0x0
0x0
USB_RXCOUNT1_COUNT
Receive Packet Count
0
13
USB0RXCOUNT2
USB Receive Byte Count Endpoint 2
0x128
16
read-write
n
0x0
0x0
USB_RXCOUNT2_COUNT
Receive Packet Count
0
13
USB0RXCOUNT3
USB Receive Byte Count Endpoint 3
0x138
16
read-write
n
0x0
0x0
USB_RXCOUNT3_COUNT
Receive Packet Count
0
13
USB0RXCOUNT4
USB Receive Byte Count Endpoint 4
0x148
16
read-write
n
0x0
0x0
USB_RXCOUNT4_COUNT
Receive Packet Count
0
13
USB0RXCOUNT5
USB Receive Byte Count Endpoint 5
0x158
16
read-write
n
0x0
0x0
USB_RXCOUNT5_COUNT
Receive Packet Count
0
13
USB0RXCOUNT6
USB Receive Byte Count Endpoint 6
0x168
16
read-write
n
0x0
0x0
USB_RXCOUNT6_COUNT
Receive Packet Count
0
13
USB0RXCOUNT7
USB Receive Byte Count Endpoint 7
0x178
16
read-write
n
0x0
0x0
USB_RXCOUNT7_COUNT
Receive Packet Count
0
13
USB0RXCSRH1
USB Receive Control and Status Endpoint 1 High
0x117
8
read-write
n
0x0
0x0
USB_RXCSRH1_AUTOCL
Auto Clear
7
8
USB_RXCSRH1_DMAEN
DMA Request Enable
5
6
USB_RXCSRH1_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH1_PIDERR
PID Error
4
5
USB0RXCSRH2
USB Receive Control and Status Endpoint 2 High
0x127
8
read-write
n
0x0
0x0
USB_RXCSRH2_AUTOCL
Auto Clear
7
8
USB_RXCSRH2_DMAEN
DMA Request Enable
5
6
USB_RXCSRH2_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH2_PIDERR
PID Error
4
5
USB0RXCSRH3
USB Receive Control and Status Endpoint 3 High
0x137
8
read-write
n
0x0
0x0
USB_RXCSRH3_AUTOCL
Auto Clear
7
8
USB_RXCSRH3_DMAEN
DMA Request Enable
5
6
USB_RXCSRH3_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH3_PIDERR
PID Error
4
5
USB0RXCSRH4
USB Receive Control and Status Endpoint 4 High
0x147
8
read-write
n
0x0
0x0
USB_RXCSRH4_AUTOCL
Auto Clear
7
8
USB_RXCSRH4_DMAEN
DMA Request Enable
5
6
USB_RXCSRH4_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH4_PIDERR
PID Error
4
5
USB0RXCSRH5
USB Receive Control and Status Endpoint 5 High
0x157
8
read-write
n
0x0
0x0
USB_RXCSRH5_AUTOCL
Auto Clear
7
8
USB_RXCSRH5_DMAEN
DMA Request Enable
5
6
USB_RXCSRH5_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH5_PIDERR
PID Error
4
5
USB0RXCSRH6
USB Receive Control and Status Endpoint 6 High
0x167
8
read-write
n
0x0
0x0
USB_RXCSRH6_AUTOCL
Auto Clear
7
8
USB_RXCSRH6_DMAEN
DMA Request Enable
5
6
USB_RXCSRH6_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH6_PIDERR
PID Error
4
5
USB0RXCSRH7
USB Receive Control and Status Endpoint 7 High
0x177
8
read-write
n
0x0
0x0
USB_RXCSRH7_AUTOCL
Auto Clear
7
8
USB_RXCSRH7_DMAEN
DMA Request Enable
5
6
USB_RXCSRH7_DMAMOD
DMA Request Mode
3
4
USB_RXCSRH7_PIDERR
PID Error
4
5
USB0RXCSRL1
USB Receive Control and Status Endpoint 1 Low
0x116
8
read-write
n
0x0
0x0
USB_RXCSRL1_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL1_DATAERR
Data Error
3
4
USB_RXCSRL1_FLUSH
Flush FIFO
4
5
USB_RXCSRL1_FULL
FIFO Full
1
2
USB_RXCSRL1_OVER
Overrun
2
3
USB_RXCSRL1_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL1_STALL
Send STALL
5
6
USB_RXCSRL1_STALLED
Endpoint Stalled
6
7
USB0RXCSRL2
USB Receive Control and Status Endpoint 2 Low
0x126
8
read-write
n
0x0
0x0
USB_RXCSRL2_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL2_DATAERR
Data Error
3
4
USB_RXCSRL2_FLUSH
Flush FIFO
4
5
USB_RXCSRL2_FULL
FIFO Full
1
2
USB_RXCSRL2_OVER
Overrun
2
3
USB_RXCSRL2_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL2_STALL
Send STALL
5
6
USB_RXCSRL2_STALLED
Endpoint Stalled
6
7
USB0RXCSRL3
USB Receive Control and Status Endpoint 3 Low
0x136
8
read-write
n
0x0
0x0
USB_RXCSRL3_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL3_DATAERR
Data Error
3
4
USB_RXCSRL3_FLUSH
Flush FIFO
4
5
USB_RXCSRL3_FULL
FIFO Full
1
2
USB_RXCSRL3_OVER
Overrun
2
3
USB_RXCSRL3_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL3_STALL
Send STALL
5
6
USB_RXCSRL3_STALLED
Endpoint Stalled
6
7
USB0RXCSRL4
USB Receive Control and Status Endpoint 4 Low
0x146
8
read-write
n
0x0
0x0
USB_RXCSRL4_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL4_DATAERR
Data Error
3
4
USB_RXCSRL4_FLUSH
Flush FIFO
4
5
USB_RXCSRL4_FULL
FIFO Full
1
2
USB_RXCSRL4_OVER
Overrun
2
3
USB_RXCSRL4_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL4_STALL
Send STALL
5
6
USB_RXCSRL4_STALLED
Endpoint Stalled
6
7
USB0RXCSRL5
USB Receive Control and Status Endpoint 5 Low
0x156
8
read-write
n
0x0
0x0
USB_RXCSRL5_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL5_DATAERR
Data Error
3
4
USB_RXCSRL5_FLUSH
Flush FIFO
4
5
USB_RXCSRL5_FULL
FIFO Full
1
2
USB_RXCSRL5_OVER
Overrun
2
3
USB_RXCSRL5_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL5_STALL
Send STALL
5
6
USB_RXCSRL5_STALLED
Endpoint Stalled
6
7
USB0RXCSRL6
USB Receive Control and Status Endpoint 6 Low
0x166
8
read-write
n
0x0
0x0
USB_RXCSRL6_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL6_DATAERR
Data Error
3
4
USB_RXCSRL6_FLUSH
Flush FIFO
4
5
USB_RXCSRL6_FULL
FIFO Full
1
2
USB_RXCSRL6_OVER
Overrun
2
3
USB_RXCSRL6_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL6_STALL
Send STALL
5
6
USB_RXCSRL6_STALLED
Endpoint Stalled
6
7
USB0RXCSRL7
USB Receive Control and Status Endpoint 7 Low
0x176
8
read-write
n
0x0
0x0
USB_RXCSRL7_CLRDT
Clear Data Toggle
7
8
USB_RXCSRL7_DATAERR
Data Error
3
4
USB_RXCSRL7_FLUSH
Flush FIFO
4
5
USB_RXCSRL7_FULL
FIFO Full
1
2
USB_RXCSRL7_OVER
Overrun
2
3
USB_RXCSRL7_RXRDY
Receive Packet Ready
0
1
USB_RXCSRL7_STALL
Send STALL
5
6
USB_RXCSRL7_STALLED
Endpoint Stalled
6
7
USB0RXDPKTBUFDIS
USB Receive Double Packet Buffer Disable
0x340
16
read-write
n
0x0
0x0
USB_RXDPKTBUFDIS_EP1
EP1 RX Double-Packet Buffer Disable
1
2
USB_RXDPKTBUFDIS_EP2
EP2 RX Double-Packet Buffer Disable
2
3
USB_RXDPKTBUFDIS_EP3
EP3 RX Double-Packet Buffer Disable
3
4
USB_RXDPKTBUFDIS_EP4
EP4 RX Double-Packet Buffer Disable
4
5
USB_RXDPKTBUFDIS_EP5
EP5 RX Double-Packet Buffer Disable
5
6
USB_RXDPKTBUFDIS_EP6
EP6 RX Double-Packet Buffer Disable
6
7
USB_RXDPKTBUFDIS_EP7
EP7 RX Double-Packet Buffer Disable
7
8
USB0RXFIFOADD
USB Receive FIFO Start Address
0x66
16
read-write
n
0x0
0x0
USB_RXFIFOADD_ADDR
Transmit/Receive Start Address
0
9
USB0RXFIFOSZ
USB Receive Dynamic FIFO Sizing
0x63
8
read-write
n
0x0
0x0
USB_RXFIFOSZ_DPB
Double Packet Buffer Support
4
5
USB_RXFIFOSZ_SIZE
Max Packet Size
0
4
USB_RXFIFOSZ_SIZE_8
8
0x0
USB_RXFIFOSZ_SIZE_16
16
0x1
USB_RXFIFOSZ_SIZE_32
32
0x2
USB_RXFIFOSZ_SIZE_64
64
0x3
USB_RXFIFOSZ_SIZE_128
128
0x4
USB_RXFIFOSZ_SIZE_256
256
0x5
USB_RXFIFOSZ_SIZE_512
512
0x6
USB_RXFIFOSZ_SIZE_1024
1024
0x7
USB_RXFIFOSZ_SIZE_2048
2048
0x8
USB0RXIE
USB Receive Interrupt Enable
0x8
16
read-write
n
0x0
0x0
USB_RXIE_EP1
RX Endpoint 1 Interrupt Enable
1
2
USB_RXIE_EP2
RX Endpoint 2 Interrupt Enable
2
3
USB_RXIE_EP3
RX Endpoint 3 Interrupt Enable
3
4
USB_RXIE_EP4
RX Endpoint 4 Interrupt Enable
4
5
USB_RXIE_EP5
RX Endpoint 5 Interrupt Enable
5
6
USB_RXIE_EP6
RX Endpoint 6 Interrupt Enable
6
7
USB_RXIE_EP7
RX Endpoint 7 Interrupt Enable
7
8
USB0RXIS
USB Receive Interrupt Status
0x4
16
read-write
n
0x0
0x0
USB_RXIS_EP1
RX Endpoint 1 Interrupt
1
2
USB_RXIS_EP2
RX Endpoint 2 Interrupt
2
3
USB_RXIS_EP3
RX Endpoint 3 Interrupt
3
4
USB_RXIS_EP4
RX Endpoint 4 Interrupt
4
5
USB_RXIS_EP5
RX Endpoint 5 Interrupt
5
6
USB_RXIS_EP6
RX Endpoint 6 Interrupt
6
7
USB_RXIS_EP7
RX Endpoint 7 Interrupt
7
8
USB0RXMAXP1
USB Maximum Receive Data Endpoint 1
0x114
16
read-write
n
0x0
0x0
USB_RXMAXP1_MAXLOAD
Maximum Payload
0
11
USB0RXMAXP2
USB Maximum Receive Data Endpoint 2
0x124
16
read-write
n
0x0
0x0
USB_RXMAXP2_MAXLOAD
Maximum Payload
0
11
USB0RXMAXP3
USB Maximum Receive Data Endpoint 3
0x134
16
read-write
n
0x0
0x0
USB_RXMAXP3_MAXLOAD
Maximum Payload
0
11
USB0RXMAXP4
USB Maximum Receive Data Endpoint 4
0x144
16
read-write
n
0x0
0x0
USB_RXMAXP4_MAXLOAD
Maximum Payload
0
11
USB0RXMAXP5
USB Maximum Receive Data Endpoint 5
0x154
16
read-write
n
0x0
0x0
USB_RXMAXP5_MAXLOAD
Maximum Payload
0
11
USB0RXMAXP6
USB Maximum Receive Data Endpoint 6
0x164
16
read-write
n
0x0
0x0
USB_RXMAXP6_MAXLOAD
Maximum Payload
0
11
USB0RXMAXP7
USB Maximum Receive Data Endpoint 7
0x174
16
read-write
n
0x0
0x0
USB_RXMAXP7_MAXLOAD
Maximum Payload
0
11
USB0TEST
USB Test Mode
0xF
8
read-write
n
0x0
0x0
USB_TEST_FIFOACC
FIFO Access
6
7
USB_TEST_FORCEFS
Force Full-Speed Mode
5
6
USB0TXCSRH1
USB Transmit Control and Status Endpoint 1 High
0x113
8
read-write
n
0x0
0x0
USB_TXCSRH1_AUTOSET
Auto Set
7
8
USB_TXCSRH1_DMAEN
DMA Request Enable
4
5
USB_TXCSRH1_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH1_FDT
Force Data Toggle
3
4
USB_TXCSRH1_ISO
Isochronous Transfers
6
7
USB_TXCSRH1_MODE
Mode
5
6
USB0TXCSRH2
USB Transmit Control and Status Endpoint 2 High
0x123
8
read-write
n
0x0
0x0
USB_TXCSRH2_AUTOSET
Auto Set
7
8
USB_TXCSRH2_DMAEN
DMA Request Enable
4
5
USB_TXCSRH2_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH2_FDT
Force Data Toggle
3
4
USB_TXCSRH2_ISO
Isochronous Transfers
6
7
USB_TXCSRH2_MODE
Mode
5
6
USB0TXCSRH3
USB Transmit Control and Status Endpoint 3 High
0x133
8
read-write
n
0x0
0x0
USB_TXCSRH3_AUTOSET
Auto Set
7
8
USB_TXCSRH3_DMAEN
DMA Request Enable
4
5
USB_TXCSRH3_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH3_FDT
Force Data Toggle
3
4
USB_TXCSRH3_ISO
Isochronous Transfers
6
7
USB_TXCSRH3_MODE
Mode
5
6
USB0TXCSRH4
USB Transmit Control and Status Endpoint 4 High
0x143
8
read-write
n
0x0
0x0
USB_TXCSRH4_AUTOSET
Auto Set
7
8
USB_TXCSRH4_DMAEN
DMA Request Enable
4
5
USB_TXCSRH4_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH4_FDT
Force Data Toggle
3
4
USB_TXCSRH4_ISO
Isochronous Transfers
6
7
USB_TXCSRH4_MODE
Mode
5
6
USB0TXCSRH5
USB Transmit Control and Status Endpoint 5 High
0x153
8
read-write
n
0x0
0x0
USB_TXCSRH5_AUTOSET
Auto Set
7
8
USB_TXCSRH5_DMAEN
DMA Request Enable
4
5
USB_TXCSRH5_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH5_FDT
Force Data Toggle
3
4
USB_TXCSRH5_ISO
Isochronous Transfers
6
7
USB_TXCSRH5_MODE
Mode
5
6
USB0TXCSRH6
USB Transmit Control and Status Endpoint 6 High
0x163
8
read-write
n
0x0
0x0
USB_TXCSRH6_AUTOSET
Auto Set
7
8
USB_TXCSRH6_DMAEN
DMA Request Enable
4
5
USB_TXCSRH6_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH6_FDT
Force Data Toggle
3
4
USB_TXCSRH6_ISO
Isochronous Transfers
6
7
USB_TXCSRH6_MODE
Mode
5
6
USB0TXCSRH7
USB Transmit Control and Status Endpoint 7 High
0x173
8
read-write
n
0x0
0x0
USB_TXCSRH7_AUTOSET
Auto Set
7
8
USB_TXCSRH7_DMAEN
DMA Request Enable
4
5
USB_TXCSRH7_DMAMOD
DMA Request Mode
2
3
USB_TXCSRH7_FDT
Force Data Toggle
3
4
USB_TXCSRH7_ISO
Isochronous Transfers
6
7
USB_TXCSRH7_MODE
Mode
5
6
USB0TXCSRL1
USB Transmit Control and Status Endpoint 1 Low
0x112
8
read-write
n
0x0
0x0
USB_TXCSRL1_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL1_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL1_FLUSH
Flush FIFO
3
4
USB_TXCSRL1_STALLED
Endpoint Stalled
5
6
USB_TXCSRL1_TXRDY
Transmit Packet Ready
0
1
USB0TXCSRL2
USB Transmit Control and Status Endpoint 2 Low
0x122
8
read-write
n
0x0
0x0
USB_TXCSRL2_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL2_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL2_FLUSH
Flush FIFO
3
4
USB_TXCSRL2_STALLED
Endpoint Stalled
5
6
USB_TXCSRL2_TXRDY
Transmit Packet Ready
0
1
USB0TXCSRL3
USB Transmit Control and Status Endpoint 3 Low
0x132
8
read-write
n
0x0
0x0
USB_TXCSRL3_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL3_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL3_FLUSH
Flush FIFO
3
4
USB_TXCSRL3_STALLED
Endpoint Stalled
5
6
USB_TXCSRL3_TXRDY
Transmit Packet Ready
0
1
USB0TXCSRL4
USB Transmit Control and Status Endpoint 4 Low
0x142
8
read-write
n
0x0
0x0
USB_TXCSRL4_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL4_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL4_FLUSH
Flush FIFO
3
4
USB_TXCSRL4_STALLED
Endpoint Stalled
5
6
USB_TXCSRL4_TXRDY
Transmit Packet Ready
0
1
USB0TXCSRL5
USB Transmit Control and Status Endpoint 5 Low
0x152
8
read-write
n
0x0
0x0
USB_TXCSRL5_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL5_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL5_FLUSH
Flush FIFO
3
4
USB_TXCSRL5_STALLED
Endpoint Stalled
5
6
USB_TXCSRL5_TXRDY
Transmit Packet Ready
0
1
USB0TXCSRL6
USB Transmit Control and Status Endpoint 6 Low
0x162
8
read-write
n
0x0
0x0
USB_TXCSRL6_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL6_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL6_FLUSH
Flush FIFO
3
4
USB_TXCSRL6_STALLED
Endpoint Stalled
5
6
USB_TXCSRL6_TXRDY
Transmit Packet Ready
0
1
USB0TXCSRL7
USB Transmit Control and Status Endpoint 7 Low
0x172
8
read-write
n
0x0
0x0
USB_TXCSRL7_CLRDT
Clear Data Toggle
6
7
USB_TXCSRL7_FIFONE
FIFO Not Empty
1
2
USB_TXCSRL7_FLUSH
Flush FIFO
3
4
USB_TXCSRL7_STALLED
Endpoint Stalled
5
6
USB_TXCSRL7_TXRDY
Transmit Packet Ready
0
1
USB0TXDPKTBUFDIS
USB Transmit Double Packet Buffer Disable
0x342
16
read-write
n
0x0
0x0
USB_TXDPKTBUFDIS_EP1
EP1 TX Double-Packet Buffer Disable
1
2
USB_TXDPKTBUFDIS_EP2
EP2 TX Double-Packet Buffer Disable
2
3
USB_TXDPKTBUFDIS_EP3
EP3 TX Double-Packet Buffer Disable
3
4
USB_TXDPKTBUFDIS_EP4
EP4 TX Double-Packet Buffer Disable
4
5
USB_TXDPKTBUFDIS_EP5
EP5 TX Double-Packet Buffer Disable
5
6
USB_TXDPKTBUFDIS_EP6
EP6 TX Double-Packet Buffer Disable
6
7
USB_TXDPKTBUFDIS_EP7
EP7 TX Double-Packet Buffer Disable
7
8
USB0TXFIFOADD
USB Transmit FIFO Start Address
0x64
16
read-write
n
0x0
0x0
USB_TXFIFOADD_ADDR
Transmit/Receive Start Address
0
9
USB0TXFIFOSZ
USB Transmit Dynamic FIFO Sizing
0x62
8
read-write
n
0x0
0x0
USB_TXFIFOSZ_DPB
Double Packet Buffer Support
4
5
USB_TXFIFOSZ_SIZE
Max Packet Size
0
4
USB_TXFIFOSZ_SIZE_8
8
0x0
USB_TXFIFOSZ_SIZE_16
16
0x1
USB_TXFIFOSZ_SIZE_32
32
0x2
USB_TXFIFOSZ_SIZE_64
64
0x3
USB_TXFIFOSZ_SIZE_128
128
0x4
USB_TXFIFOSZ_SIZE_256
256
0x5
USB_TXFIFOSZ_SIZE_512
512
0x6
USB_TXFIFOSZ_SIZE_1024
1024
0x7
USB_TXFIFOSZ_SIZE_2048
2048
0x8
USB0TXIE
USB Transmit Interrupt Enable
0x6
16
read-write
n
0x0
0x0
USB_TXIE_EP0
TX and RX Endpoint 0 Interrupt Enable
0
1
USB_TXIE_EP1
TX Endpoint 1 Interrupt Enable
1
2
USB_TXIE_EP2
TX Endpoint 2 Interrupt Enable
2
3
USB_TXIE_EP3
TX Endpoint 3 Interrupt Enable
3
4
USB_TXIE_EP4
TX Endpoint 4 Interrupt Enable
4
5
USB_TXIE_EP5
TX Endpoint 5 Interrupt Enable
5
6
USB_TXIE_EP6
TX Endpoint 6 Interrupt Enable
6
7
USB_TXIE_EP7
TX Endpoint 7 Interrupt Enable
7
8
USB0TXIS
USB Transmit Interrupt Status
0x2
16
read-write
n
0x0
0x0
USB_TXIS_EP0
TX and RX Endpoint 0 Interrupt
0
1
USB_TXIS_EP1
TX Endpoint 1 Interrupt
1
2
USB_TXIS_EP2
TX Endpoint 2 Interrupt
2
3
USB_TXIS_EP3
TX Endpoint 3 Interrupt
3
4
USB_TXIS_EP4
TX Endpoint 4 Interrupt
4
5
USB_TXIS_EP5
TX Endpoint 5 Interrupt
5
6
USB_TXIS_EP6
TX Endpoint 6 Interrupt
6
7
USB_TXIS_EP7
TX Endpoint 7 Interrupt
7
8
USB0TXMAXP1
USB Maximum Transmit Data Endpoint 1
0x110
16
read-write
n
0x0
0x0
USB_TXMAXP1_MAXLOAD
Maximum Payload
0
11
USB0TXMAXP2
USB Maximum Transmit Data Endpoint 2
0x120
16
read-write
n
0x0
0x0
USB_TXMAXP2_MAXLOAD
Maximum Payload
0
11
USB0TXMAXP3
USB Maximum Transmit Data Endpoint 3
0x130
16
read-write
n
0x0
0x0
USB_TXMAXP3_MAXLOAD
Maximum Payload
0
11
USB0TXMAXP4
USB Maximum Transmit Data Endpoint 4
0x140
16
read-write
n
0x0
0x0
USB_TXMAXP4_MAXLOAD
Maximum Payload
0
11
USB0TXMAXP5
USB Maximum Transmit Data Endpoint 5
0x150
16
read-write
n
0x0
0x0
USB_TXMAXP5_MAXLOAD
Maximum Payload
0
11
USB0TXMAXP6
USB Maximum Transmit Data Endpoint 6
0x160
16
read-write
n
0x0
0x0
USB_TXMAXP6_MAXLOAD
Maximum Payload
0
11
USB0TXMAXP7
USB Maximum Transmit Data Endpoint 7
0x170
16
read-write
n
0x0
0x0
USB_TXMAXP7_MAXLOAD
Maximum Payload
0
11
WATCHDOG0
Register map for WATCHDOG0 peripheral
WATCHDOG
0x0
0x0
0x1000
registers
n
CTL
Watchdog Control
0x8
-1
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
ICR
Watchdog Interrupt Clear
0xC
-1
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
LOAD
Watchdog Load
0x0
-1
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
LOCK
Watchdog Lock
0xC00
-1
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
MIS
Watchdog Masked Interrupt Status
0x14
-1
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
RIS
Watchdog Raw Interrupt Status
0x10
-1
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
TEST
Watchdog Test
0x418
-1
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
VALUE
Watchdog Value
0x4
-1
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WATCHDOG0CTL
Watchdog Control
0x8
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
WATCHDOG0ICR
Watchdog Interrupt Clear
0xC
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
WATCHDOG0LOAD
Watchdog Load
0x0
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
WATCHDOG0LOCK
Watchdog Lock
0xC00
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
WATCHDOG0MIS
Watchdog Masked Interrupt Status
0x14
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
WATCHDOG0RIS
Watchdog Raw Interrupt Status
0x10
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
WATCHDOG0TEST
Watchdog Test
0x418
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
WATCHDOG0VALUE
Watchdog Value
0x4
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WATCHDOG1
Register map for WATCHDOG0 peripheral
WATCHDOG
0x0
0x0
0x1000
registers
n
CTL
Watchdog Control
0x8
-1
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
ICR
Watchdog Interrupt Clear
0xC
-1
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
LOAD
Watchdog Load
0x0
-1
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
LOCK
Watchdog Lock
0xC00
-1
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
MIS
Watchdog Masked Interrupt Status
0x14
-1
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
RIS
Watchdog Raw Interrupt Status
0x10
-1
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
TEST
Watchdog Test
0x418
-1
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
VALUE
Watchdog Value
0x4
-1
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WATCHDOG0CTL
Watchdog Control
0x8
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
WATCHDOG0ICR
Watchdog Interrupt Clear
0xC
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
WATCHDOG0LOAD
Watchdog Load
0x0
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
WATCHDOG0LOCK
Watchdog Lock
0xC00
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
WATCHDOG0MIS
Watchdog Masked Interrupt Status
0x14
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
WATCHDOG0RIS
Watchdog Raw Interrupt Status
0x10
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
WATCHDOG0TEST
Watchdog Test
0x418
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
WATCHDOG0VALUE
Watchdog Value
0x4
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WTIMER0
Register map for WTIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
WTIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
WTIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
WTIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
WTIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
WTIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
WTIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
WTIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
WTIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
WTIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
WTIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
WTIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
WTIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
WTIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
WTIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
WTIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
WTIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
WTIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
WTIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
WTIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
WTIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
WTIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
WTIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
WTIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
WTIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
WTIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
WTIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
WTIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER1
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER2
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER3
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER4
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER5
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
16-bit timer configuration. The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Capture A Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Capture A Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Capture B Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Capture B Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Mode Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Mode Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Capture A Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Capture A Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Capture B Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Capture B Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Mode Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Mode Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Capture A Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Capture A Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Capture B Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Capture B Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Mode Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Mode Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Capture A Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Capture A Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Capture B Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Capture B Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Mode Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Mode Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM 16/32-Bit Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM 16/32-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM 16/32-Bit Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM 16/32-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM 16/32-Bit Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM 16/32-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM 16/32-Bit Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM 16/32-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM 16/32-Bit Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM 16/32-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM 16/32-Bit Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM 16/32-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM 16/32-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM 16/32-Bit Timer 5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0